arm-trusted-firmware/lib/el3_runtime
Jeenu Viswambharan ef653d93cc AArch64: Refactor GP register restore to separate function
At present, the function that restores general purpose registers also
does ERET. Refactor the restore code to restore general purpose
registers without ERET to complement the save function.

The macro save_x18_to_x29_sp_el0 was used only once, and is therefore
removed, and its contents expanded inline for readability.

No functional changes, but with this patch:

  - The SMC return path will incur an branch-return and an additional
    register load.

  - The unknown SMC path restores registers x0 to x3.

Change-Id: I7a1a63e17f34f9cde810685d70a0ad13ca3b7c50
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
2018-05-04 08:32:42 +01:00
..
aarch32 Rename 'smcc' to 'smccc' 2018-03-21 10:49:27 +00:00
aarch64 AArch64: Refactor GP register restore to separate function 2018-05-04 08:32:42 +01:00
cpu_data_array.c Use SPDX license identifiers 2017-05-03 09:39:28 +01:00