Dan Handley ce4c820d8c Remove use of PLATFORM_CACHE_LINE_SIZE ... The required platform constant PLATFORM_CACHE_LINE_SIZE is unnecessary since CACHE_WRITEBACK_GRANULE effectively provides the same information. CACHE_WRITEBACK_GRANULE is preferred since this is an architecturally defined term and allows comparison with the corresponding hardware register value. Replace all usage of PLATFORM_CACHE_LINE_SIZE with CACHE_WRITEBACK_GRANULE. Also, add a runtime assert in BL1 to check that the provided CACHE_WRITEBACK_GRANULE matches the value provided in CTR_EL0. Change-Id: If87286be78068424217b9f3689be358356500dcd		2015-04-27 18:05:06 +01:00
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aarch64	Add support to indicate size and end of assembly functions	2015-04-08 13:02:59 +01:00
bl1.ld.S	Remove coherent memory from the BL memory maps	2015-01-22 10:57:44 +00:00
bl1.mk	Introduce framework for CPU specific operations	2014-08-20 19:13:25 +01:00
bl1_main.c	Remove use of PLATFORM_CACHE_LINE_SIZE	2015-04-27 18:05:06 +01:00
bl1_private.h	Remove concept of top/bottom image loading	2014-07-01 10:59:43 +01:00