242 lines
6.2 KiB
C
242 lines
6.2 KiB
C
/*
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* Copyright (c) 2022, MediaTek Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arch_helpers.h>
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#include <common/debug.h>
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#ifndef ATF_PLAT_CIRQ_UNSUPPORT
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#include <mt_gic_v3.h>
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#endif
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#include <mt_lp_rm.h>
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#include <mt_spm.h>
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#include <mt_spm_cond.h>
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#include <mt_spm_conservation.h>
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#include <mt_spm_constraint.h>
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#include <mt_spm_idle.h>
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#include <mt_spm_internal.h>
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#include <mt_spm_notifier.h>
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#include <mt_spm_pmic_wrap.h>
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#include <mt_spm_rc_internal.h>
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#include <mt_spm_reg.h>
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#include <mt_spm_resource_req.h>
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#include <mt_spm_suspend.h>
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#ifndef ATF_PLAT_CIRQ_UNSUPPORT
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#include <mtk_cirq.h>
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#endif
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#include <plat_mtk_lpm.h>
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#include <plat_pm.h>
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#define CONSTRAINT_BUS26M_ALLOW \
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(MT_RM_CONSTRAINT_ALLOW_CPU_BUCK_OFF | \
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MT_RM_CONSTRAINT_ALLOW_DRAM_S0 | \
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MT_RM_CONSTRAINT_ALLOW_DRAM_S1 | \
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MT_RM_CONSTRAINT_ALLOW_VCORE_LP | \
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MT_RM_CONSTRAINT_ALLOW_LVTS_STATE | \
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MT_RM_CONSTRAINT_ALLOW_BUS26M_OFF)
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#define CONSTRAINT_BUS26M_PCM_FLAG \
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(SPM_FLAG_DISABLE_INFRA_PDN | \
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SPM_FLAG_DISABLE_VCORE_DVS | \
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SPM_FLAG_DISABLE_VCORE_DFS | \
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SPM_FLAG_SRAM_SLEEP_CTRL | \
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SPM_FLAG_ENABLE_TIA_WORKAROUND | \
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SPM_FLAG_ENABLE_LVTS_WORKAROUND | \
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SPM_FLAG_KEEP_CSYSPWRACK_HIGH)
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#define CONSTRAINT_BUS26M_PCM_FLAG1 (0U)
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#define CONSTRAINT_BUS26M_RESOURCE_REQ (0U)
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static unsigned int bus26m_ext_opand;
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static struct mt_irqremain *refer2remain_irq;
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static struct mt_spm_cond_tables cond_bus26m = {
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.name = "bus26m",
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.table_cg = {
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0x0385E03C, /* MTCMOS1 */
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0x003F0100, /* INFRA0 */
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0x0A040802, /* INFRA1 */
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0x06017E51, /* INFRA2 */
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0x08000000, /* INFRA3 */
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0x00000000, /* INFRA4 */
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0x00000000, /* INFRA5 */
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0x03720820, /* MMSYS0 */
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0x00000000, /* MMSYS1 */
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0x00000000, /* MMSYS2 */
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0x00015151, /* MMSYS3 */
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},
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.table_pll = (PLL_BIT_UNIVPLL | PLL_BIT_MFGPLL |
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PLL_BIT_MSDCPLL | PLL_BIT_TVDPLL |
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PLL_BIT_MMPLL),
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};
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static struct mt_spm_cond_tables cond_bus26m_res = {
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.table_cg = {0U},
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.table_pll = 0U,
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};
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static struct constraint_status status = {
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.id = MT_RM_CONSTRAINT_ID_BUS26M,
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.valid = (MT_SPM_RC_VALID_SW | MT_SPM_RC_VALID_COND_LATCH),
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.cond_block = 0U,
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.enter_cnt = 0U,
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.cond_res = &cond_bus26m_res,
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};
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/*
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* Cirq will take the place of gic when gic is off.
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* However, cirq cannot work if 26m clk is turned off when system idle/suspend.
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* Therefore, we need to set irq pending for specific wakeup source.
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*/
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#ifdef ATF_PLAT_CIRQ_UNSUPPORT
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#define do_irqs_delivery()
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#else
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static void mt_spm_irq_remain_dump(struct mt_irqremain *irqs,
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unsigned int irq_index,
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struct wake_status *wakeup)
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{
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INFO("[SPM] r12 = 0x%08x(0x%08x), flag = 0x%08x 0x%08x 0x%08x\n",
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wakeup->tr.comm.r12, wakeup->md32pcm_wakeup_sta,
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wakeup->tr.comm.debug_flag, wakeup->tr.comm.b_sw_flag0,
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wakeup->tr.comm.b_sw_flag1);
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INFO("irq:%u(0x%08x) set pending\n",
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irqs->wakeupsrc[irq_index], irqs->irqs[irq_index]);
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}
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static void do_irqs_delivery(void)
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{
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unsigned int idx;
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int res = 0;
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struct wake_status *wakeup = NULL;
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struct mt_irqremain *irqs = refer2remain_irq;
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res = spm_conservation_get_result(&wakeup);
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if ((res != 0) && (irqs == NULL)) {
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return;
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}
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for (idx = 0; idx < irqs->count; ++idx) {
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if (((wakeup->tr.comm.r12 & irqs->wakeupsrc[idx]) != 0U) ||
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((wakeup->raw_sta & irqs->wakeupsrc[idx]) != 0U)) {
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if ((irqs->wakeupsrc_cat[idx] & MT_IRQ_REMAIN_CAT_LOG) != 0U) {
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mt_spm_irq_remain_dump(irqs, idx, wakeup);
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}
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mt_irq_set_pending(irqs->irqs[idx]);
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}
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}
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}
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#endif
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static void spm_bus26m_conduct(struct spm_lp_scen *spm_lp, unsigned int *resource_req)
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{
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spm_lp->pwrctrl->pcm_flags = (uint32_t)CONSTRAINT_BUS26M_PCM_FLAG;
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spm_lp->pwrctrl->pcm_flags1 = (uint32_t)CONSTRAINT_BUS26M_PCM_FLAG1;
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*resource_req |= CONSTRAINT_BUS26M_RESOURCE_REQ;
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}
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bool spm_is_valid_rc_bus26m(unsigned int cpu, int state_id)
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{
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(void)cpu;
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(void)state_id;
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return ((status.cond_block == 0U) && IS_MT_RM_RC_READY(status.valid));
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}
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int spm_update_rc_bus26m(int state_id, int type, const void *val)
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{
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const struct mt_spm_cond_tables *tlb;
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const struct mt_spm_cond_tables *tlb_check;
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int res = MT_RM_STATUS_OK;
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if (val == NULL) {
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res = MT_RM_STATUS_BAD;
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} else {
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if (type == PLAT_RC_UPDATE_CONDITION) {
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tlb = (const struct mt_spm_cond_tables *)val;
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tlb_check = (const struct mt_spm_cond_tables *)&cond_bus26m;
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status.cond_block =
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mt_spm_cond_check(state_id, tlb, tlb_check,
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((status.valid &
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MT_SPM_RC_VALID_COND_LATCH) != 0U) ?
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(&cond_bus26m_res) : (NULL));
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} else if (type == PLAT_RC_UPDATE_REMAIN_IRQS) {
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refer2remain_irq = (struct mt_irqremain *)val;
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} else {
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res = MT_RM_STATUS_BAD;
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}
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}
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return res;
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}
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unsigned int spm_allow_rc_bus26m(int state_id)
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{
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(void)state_id;
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return CONSTRAINT_BUS26M_ALLOW;
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}
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int spm_run_rc_bus26m(unsigned int cpu, int state_id)
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{
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(void)cpu;
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unsigned int ext_op = MT_SPM_EX_OP_HW_S1_DETECT;
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#ifndef ATF_PLAT_SPM_SSPM_NOTIFIER_UNSUPPORT
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#ifdef ATF_VOLTAGE_BIN_VCORE_SUPPORT
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#define SUSPEND_VB_MAGIC (0x5642)
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if (IS_PLAT_SUSPEND_ID(state_id)) {
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mt_spm_sspm_notify_u32(MT_SPM_NOTIFY_SUSPEND_VCORE_VOLTAGE,
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((SUSPEND_VB_MAGIC << 16) |
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spm_get_suspend_vcore_voltage_idx()));
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}
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#endif
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mt_spm_sspm_notify_u32(MT_SPM_NOTIFY_LP_ENTER, CONSTRAINT_BUS26M_ALLOW |
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(IS_PLAT_SUSPEND_ID(state_id) ?
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(MT_RM_CONSTRAINT_ALLOW_AP_SUSPEND) : (0U)));
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#endif
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if (IS_PLAT_SUSPEND_ID(state_id)) {
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mt_spm_suspend_enter(state_id,
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(MT_SPM_EX_OP_CLR_26M_RECORD |
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MT_SPM_EX_OP_SET_WDT |
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MT_SPM_EX_OP_HW_S1_DETECT |
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bus26m_ext_opand),
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CONSTRAINT_BUS26M_RESOURCE_REQ);
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} else {
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mt_spm_idle_generic_enter(state_id, ext_op, spm_bus26m_conduct);
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}
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return 0;
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}
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int spm_reset_rc_bus26m(unsigned int cpu, int state_id)
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{
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unsigned int ext_op = MT_SPM_EX_OP_HW_S1_DETECT;
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(void)cpu;
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#ifndef ATF_PLAT_SPM_SSPM_NOTIFIER_UNSUPPORT
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mt_spm_sspm_notify_u32(MT_SPM_NOTIFY_LP_LEAVE, 0U);
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#endif
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if (IS_PLAT_SUSPEND_ID(state_id)) {
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ext_op |= (bus26m_ext_opand | MT_SPM_EX_OP_SET_WDT);
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mt_spm_suspend_resume(state_id, ext_op, NULL);
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bus26m_ext_opand = 0U;
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} else {
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mt_spm_idle_generic_resume(state_id, ext_op, NULL, NULL);
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status.enter_cnt++;
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}
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do_irqs_delivery();
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return 0;
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}
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