26 lines
675 B
C
26 lines
675 B
C
/*
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* Copyright (c) 2022, MediaTek Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef __SSPM_REG_H__
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#define __SSPM_REG_H__
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#include "platform_def.h"
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#define SSPM_CFGREG_BASE (IO_PHYS + 0x440000) /* SSPM view: 0x30040000 */
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#define SSPM_CFGREG_ADDR(ofs) (SSPM_CFGREG_BASE + (ofs))
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#define SSPM_MCDI_SHARE_SRAM (IO_PHYS + 0x420000)
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#define SSPM_MBOX_3_BASE (IO_PHYS + 0x480000)
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#define SSPM_HW_SEM SSPM_CFGREG_ADDR(0x0048)
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#define SSPM_ACAO_INT_SET SSPM_CFGREG_ADDR(0x00D8)
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#define SSPM_ACAO_INT_CLR SSPM_CFGREG_ADDR(0x00DC)
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#define STANDBYWFI_EN(n) (1 << (n + 8))
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#define GIC_IRQOUT_EN(n) (1 << (n + 0))
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#endif /* __SSPM_REG_H__ */
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