johpow01 3f0d83695c Workaround for Cortex A76 erratum 1946160 ... Cortex A76 erratum 1946160 is a Cat B erratum, present in some revisions of the A76 processor core. The workaround is to insert a DMB ST before acquire atomic instructions without release semantics. This issue is present in revisions r0p0 - r4p1 but this workaround only applies to revisions r3p0 - r4p1, there is no workaround for older versions. SDEN can be found here: https://documentation-service.arm.com/static/5fbb77d7d77dd807b9a80cc1 Signed-off-by: John Powell <john.powell@arm.com> Change-Id: Ief33779ee76a89ce2649812ae5214b86a139e327		2020-12-18 17:41:23 +00:00
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aarch32	Cortex A9:errata 794073 workaround	2019-04-12 10:10:32 +00:00
aarch64	Workaround for Cortex A76 erratum 1946160	2020-12-18 17:41:23 +00:00
cpu-ops.mk	Workaround for Cortex A76 erratum 1946160	2020-12-18 17:41:23 +00:00
errata_report.c	Coverity: remove unnecessary header file includes	2020-02-04 10:23:51 -06:00