78 lines
3.0 KiB
C
78 lines
3.0 KiB
C
/*
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* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <dram.h>
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#include <plat_private.h>
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#include <secure.h>
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#include <soc.h>
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#include <rk3399_def.h>
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__sramdata struct rk3399_sdram_params sdram_config;
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void dram_init(void)
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{
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uint32_t os_reg2_val, i;
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os_reg2_val = mmio_read_32(PMUGRF_BASE + PMUGRF_OSREG(2));
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sdram_config.dramtype = SYS_REG_DEC_DDRTYPE(os_reg2_val);
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sdram_config.num_channels = SYS_REG_DEC_NUM_CH(os_reg2_val);
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sdram_config.stride = (mmio_read_32(SGRF_BASE + SGRF_SOC_CON3_7(4)) >>
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10) & 0x1f;
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for (i = 0; i < 2; i++) {
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struct rk3399_sdram_channel *ch = &sdram_config.ch[i];
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struct rk3399_msch_timings *noc = &ch->noc_timings;
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if (!(SYS_REG_DEC_CHINFO(os_reg2_val, i)))
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continue;
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ch->rank = SYS_REG_DEC_RANK(os_reg2_val, i);
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ch->col = SYS_REG_DEC_COL(os_reg2_val, i);
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ch->bk = SYS_REG_DEC_BK(os_reg2_val, i);
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ch->bw = SYS_REG_DEC_BW(os_reg2_val, i);
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ch->dbw = SYS_REG_DEC_DBW(os_reg2_val, i);
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ch->row_3_4 = SYS_REG_DEC_ROW_3_4(os_reg2_val, i);
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ch->cs0_row = SYS_REG_DEC_CS0_ROW(os_reg2_val, i);
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ch->cs1_row = SYS_REG_DEC_CS1_ROW(os_reg2_val, i);
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ch->ddrconfig = mmio_read_32(MSCH_BASE(i) + MSCH_DEVICECONF);
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noc->ddrtiminga0.d32 = mmio_read_32(MSCH_BASE(i) +
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MSCH_DDRTIMINGA0);
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noc->ddrtimingb0.d32 = mmio_read_32(MSCH_BASE(i) +
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MSCH_DDRTIMINGB0);
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noc->ddrtimingc0.d32 = mmio_read_32(MSCH_BASE(i) +
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MSCH_DDRTIMINGC0);
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noc->devtodev0.d32 = mmio_read_32(MSCH_BASE(i) +
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MSCH_DEVTODEV0);
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noc->ddrmode.d32 = mmio_read_32(MSCH_BASE(i) + MSCH_DDRMODE);
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noc->agingx0 = mmio_read_32(MSCH_BASE(i) + MSCH_AGINGX0);
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}
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}
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