43 lines
1.1 KiB
C
43 lines
1.1 KiB
C
/*
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* Copyright (c) 2021, MediaTek Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef __MTK_APUSYS_H__
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#define __MTK_APUSYS_H__
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#include <stdint.h>
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/* setup the SMC command ops */
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#define MTK_SIP_APU_START_MCU 0x00U
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#define MTK_SIP_APU_STOP_MCU 0x01U
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/* AO Register */
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#define AO_MD32_PRE_DEFINE (APUSYS_APU_S_S_4_BASE + 0x00)
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#define AO_MD32_BOOT_CTRL (APUSYS_APU_S_S_4_BASE + 0x04)
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#define AO_MD32_SYS_CTRL (APUSYS_APU_S_S_4_BASE + 0x08)
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#define AO_SEC_FW (APUSYS_APU_S_S_4_BASE + 0x10)
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#define PRE_DEFINE_CACHE_TCM 0x3U
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#define PRE_DEFINE_CACHE 0x2U
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#define PRE_DEFINE_SHIFT_0G 0U
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#define PRE_DEFINE_SHIFT_1G 2U
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#define PRE_DEFINE_SHIFT_2G 4U
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#define PRE_DEFINE_SHIFT_3G 6U
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#define SEC_FW_NON_SECURE 1U
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#define SEC_FW_SHIFT_NS 4U
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#define SEC_FW_DOMAIN_SHIFT 0U
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#define SYS_CTRL_RUN 0U
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#define SYS_CTRL_STALL 1U
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/* Reviser Register */
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#define REVISER_SECUREFW_CTXT (APUSYS_SCTRL_REVISER_BASE + 0x300)
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#define REVISER_USDRFW_CTXT (APUSYS_SCTRL_REVISER_BASE + 0x304)
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uint64_t apusys_kernel_ctrl(uint64_t x1, uint64_t x2, uint64_t x3, uint64_t x4,
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uint32_t *ret1);
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#endif /* __MTK_APUSYS_H__ */
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