Achin Gupta 0c8d4fef28 Unmask SError interrupt and clear SCR_EL3.EA bit ... This patch disables routing of external aborts from lower exception levels to EL3 and ensures that a SError interrupt generated as a result of execution in EL3 is taken locally instead of a lower exception level. The SError interrupt is enabled in the TSP code only when the operation has not been directly initiated by the normal world. This is to prevent the possibility of an asynchronous external abort which originated in normal world from being taken when execution is in S-EL1. Fixes ARM-software/tf-issues#153 Change-Id: I157b996c75996d12fd86d27e98bc73dd8bce6cd5		2014-08-15 10:21:50 +01:00
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bl2_arch_setup.c	Reduce deep nesting of header files	2014-05-06 13:57:48 +01:00
bl2_entrypoint.S	Unmask SError interrupt and clear SCR_EL3.EA bit	2014-08-15 10:21:50 +01:00