Marcin Wojtas 8fa1340892 marvell: comphy: cp110: implement erratum IPCE_COMPHY-1353 ... According to erratum IPCE_COMPHY-1353 the TX_IDLE bit should be toggled in addition to the XFI/SFI PHY reset. Change-Id: Idd2c2abfcb2f960caa01e6d69db524c2e4734f50 Signed-off-by: Marcin Wojtas <mw@semihalf.com>		2020-10-04 15:49:01 +02:00
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comphy	marvell: comphy: cp110: implement erratum IPCE_COMPHY-1353	2020-10-04 15:49:01 +02:00
mc_trustzone	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
mg_conf_cm3	drivers: marvell: mg_conf_cm3: pass comphy lane number to AP FW	2020-07-10 10:55:09 +00:00
mochi	drivers: marvell: mochi: Update AP incoming masters secure level	2020-10-04 15:29:05 +02:00
uart	a3700: Use generic console_t data structure	2020-02-25 09:34:38 +00:00
amb_adec.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
ap807_clocks_init.c	ble: ap807: improve PLL configuration sequence	2020-06-07 00:06:03 +02:00
cache_llc.c	drivers: marvell: Fix the LLC SRAM driver	2020-07-10 10:55:33 +00:00
ccu.c	plat: marvell: armada: add ccu window for workaround errata-id 3033912	2020-10-04 15:23:29 +02:00
comphy.h	Standardise header guards across codebase	2018-11-08 10:20:19 +00:00
gwin.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
io_win.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
iob.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
mci.c	plat: marvell: mci: perform mci link tuning for all mci interfaces	2020-06-07 00:06:03 +02:00
thermal.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00