20 lines
388 B
C
20 lines
388 B
C
/*
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* Copyright 2022 NXP
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef IFC_NAND_H
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#define IFC_NAND_H
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#define NXP_IFC_SRAM_BUFFER_SIZE UL(0x100000) /* 1M */
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int ifc_nand_init(uintptr_t *block_dev_spec,
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uintptr_t ifc_region_addr,
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uintptr_t ifc_register_addr,
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size_t ifc_sram_size,
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uintptr_t ifc_nand_blk_offset,
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size_t ifc_nand_blk_size);
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#endif /*IFC_NAND_H*/
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