Louis Mayencourt 9814bfc1bf fconf: Populate properties from dtb during bl2 setup ... Use the dtb provided by bl1 as configuration file for fconf. Change-Id: I3f466ad9b7047e1a361d94e71ac6d693e31496d9 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>		2020-02-07 13:51:31 +00:00
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allwinner	allwinner: Unify Platform specific defines for PSCI module	2020-01-24 13:14:34 +00:00
amlogic	Merge changes from topic "amlogic-g12a" into integration	2019-09-27 09:53:40 +00:00
arm	fconf: Populate properties from dtb during bl2 setup	2020-02-07 13:51:31 +00:00
common	Coverity: remove unnecessary header file includes	2020-02-04 10:23:51 -06:00
hisilicon	hisilicon: Unify Platform specific defines for PSCI module	2020-01-24 13:01:27 +00:00
imx	Enable -Wredundant-decls warning check	2020-01-28 11:09:02 -06:00
intel/soc	intel: Introduce SMC support for mailbox command	2020-02-05 16:26:15 +08:00
layerscape	layerscape: Unify Platform specific defines for PSCI module	2020-01-24 13:15:40 +00:00
marvell	marvell: Unify Platform specific defines for PSCI module	2020-01-24 13:14:55 +00:00
mediatek	Use correct type when reading SCR register	2020-01-28 11:10:48 +00:00
nvidia/tegra	Tegra194: mce: declare nvg_roc_clean_cache_trbits()	2020-02-05 19:15:40 +00:00
qemu	qemu: Implement PSCI_CPU_OFF.	2020-01-29 10:50:25 +00:00
renesas/rcar	Merge "Use correct type when reading SCR register" into integration	2020-01-30 16:55:55 +00:00
rockchip	Use correct type when reading SCR register	2020-01-28 11:10:48 +00:00
rpi	Merge "rpi3/4: Add support for offlining CPUs" into integration	2020-01-20 22:16:43 +00:00
socionext	Merge "Use correct type when reading SCR register" into integration	2020-01-30 16:55:55 +00:00
st	Enable -Wredundant-decls warning check	2020-01-28 11:09:02 -06:00
ti/k3	Merge "Use correct type when reading SCR register" into integration	2020-01-30 16:55:55 +00:00
xilinx	xilinx: versal: Pass result count to pm_get_callbackdata()	2020-01-30 11:31:52 -08:00