53 lines
1.6 KiB
C
53 lines
1.6 KiB
C
/*
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* Copyright (c) 2019-2020, Broadcom
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <stdint.h>
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#include <plat_brcm.h>
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#include <platform_def.h>
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/*
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* On Stingray, the system power level is the highest power level.
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* The first entry in the power domain descriptor specifies the
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* number of system power domains i.e. 1.
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*/
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#define SR_PWR_DOMAINS_AT_MAX_PWR_LVL 1
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/*
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* The Stingray power domain tree descriptor. The cluster power domains
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* are arranged so that when the PSCI generic code creates the power
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* domain tree, the indices of the CPU power domain nodes it allocates
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* match the linear indices returned by plat_core_pos_by_mpidr()
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* i.e. CLUSTER0 CPUs are allocated indices from 0 to 1 and the higher
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* indices for other Cluster CPUs.
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*/
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const unsigned char sr_power_domain_tree_desc[] = {
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/* No of root nodes */
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SR_PWR_DOMAINS_AT_MAX_PWR_LVL,
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/* No of children for the root node */
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BRCM_CLUSTER_COUNT,
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/* No of children for the first cluster node */
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PLATFORM_CLUSTER0_CORE_COUNT,
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/* No of children for the second cluster node */
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PLATFORM_CLUSTER1_CORE_COUNT,
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/* No of children for the third cluster node */
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PLATFORM_CLUSTER2_CORE_COUNT,
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/* No of children for the fourth cluster node */
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PLATFORM_CLUSTER3_CORE_COUNT,
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};
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/*******************************************************************************
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* This function returns the Stingray topology tree information.
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******************************************************************************/
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const unsigned char *plat_get_power_domain_tree_desc(void)
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{
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return sr_power_domain_tree_desc;
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}
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int plat_core_pos_by_mpidr(u_register_t mpidr)
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{
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return plat_brcm_calc_core_pos(mpidr);
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}
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