Ken Chang 9b51aa87a7 Tegra: memctrl: map video memory as uncached ... Memmap video memory as uncached normal memory by adding flag 'MT_NON_CACHEABLE' in mmap_add_dynamic_region(). This improves the time taken for clearing the non-overlapping video memory: test conditions: 32MB memory size, EMC running at 1866MHz, t186 1) without MT_NON_CACHEABLE: 30ms ~ 40ms <3>[ 133.852885] vpr-heap: update vpr base to 0x00000000c6000000, size=e000000 <3>[ 133.860471] _tegra_set_vpr_params[120]: begin <3>[ 133.896481] _tegra_set_vpr_params[123]: end <3>[ 133.908944] vpr-heap: update vpr base to 0x00000000c6000000, size=c000000 <3>[ 133.916397] _tegra_set_vpr_params[120]: begin <3>[ 133.956369] _tegra_set_vpr_params[123]: end <3>[ 133.970394] vpr-heap: update vpr base to 0x00000000c6000000, size=a000000 <3>[ 133.977934] _tegra_set_vpr_params[120]: begin <3>[ 134.013874] _tegra_set_vpr_params[123]: end <3>[ 134.025666] vpr-heap: update vpr base to 0x00000000c6000000, size=8000000 <3>[ 134.033512] _tegra_set_vpr_params[120]: begin <3>[ 134.065996] _tegra_set_vpr_params[123]: end <3>[ 134.075465] vpr-heap: update vpr base to 0x00000000c6000000, size=6000000 <3>[ 134.082923] _tegra_set_vpr_params[120]: begin <3>[ 134.113119] _tegra_set_vpr_params[123]: end <3>[ 134.123448] vpr-heap: update vpr base to 0x00000000c6000000, size=4000000 <3>[ 134.130790] _tegra_set_vpr_params[120]: begin <3>[ 134.162523] _tegra_set_vpr_params[123]: end <3>[ 134.172413] vpr-heap: update vpr base to 0x00000000c6000000, size=2000000 <3>[ 134.179772] _tegra_set_vpr_params[120]: begin <3>[ 134.209142] _tegra_set_vpr_params[123]: end 2) with MT_NON_CACHEABLE: 10ms ~ 18ms <3>[ 102.108702] vpr-heap: update vpr base to 0x00000000c6000000, size=e000000 <3>[ 102.116296] _tegra_set_vpr_params[120]: begin <3>[ 102.134272] _tegra_set_vpr_params[123]: end <3>[ 102.145839] vpr-heap: update vpr base to 0x00000000c6000000, size=c000000 <3>[ 102.153226] _tegra_set_vpr_params[120]: begin <3>[ 102.164201] _tegra_set_vpr_params[123]: end <3>[ 102.172275] vpr-heap: update vpr base to 0x00000000c6000000, size=a000000 <3>[ 102.179638] _tegra_set_vpr_params[120]: begin <3>[ 102.190342] _tegra_set_vpr_params[123]: end <3>[ 102.197524] vpr-heap: update vpr base to 0x00000000c6000000, size=8000000 <3>[ 102.205085] _tegra_set_vpr_params[120]: begin <3>[ 102.216112] _tegra_set_vpr_params[123]: end <3>[ 102.224080] vpr-heap: update vpr base to 0x00000000c6000000, size=6000000 <3>[ 102.231387] _tegra_set_vpr_params[120]: begin <3>[ 102.241775] _tegra_set_vpr_params[123]: end <3>[ 102.248825] vpr-heap: update vpr base to 0x00000000c6000000, size=4000000 <3>[ 102.256069] _tegra_set_vpr_params[120]: begin <3>[ 102.266368] _tegra_set_vpr_params[123]: end <3>[ 102.273400] vpr-heap: update vpr base to 0x00000000c6000000, size=2000000 <3>[ 102.280672] _tegra_set_vpr_params[120]: begin <3>[ 102.290929] _tegra_set_vpr_params[123]: end Change-Id: I5f604064ce7b8b73ea9ad5860156ae5e2c6cc42a Signed-off-by: Ken Chang <kenc@nvidia.com>		2020-03-21 19:00:05 -07:00
..
tegra	Tegra: memctrl: map video memory as uncached	2020-03-21 19:00:05 -07:00