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Yann Gautier b053a22e8a stm32mp1: add minimal support for co-processor Cortex-M4 
STM32MP1 chip embeds a dual Cortex-A7 and a Cortex-M4.
The support for Cortex-M4 clocks is added when configuring the clock tree.
Some minimal security features to allow communications between A7 and M4
are also added.

Change-Id: I60417e244a476f60a2758f4969700b2684056665
Signed-off-by: Yann Gautier <yann.gautier@st.com>
 		2019-02-20 17:34:21 +01:00
..
bsec stm32mp1: add BSEC driver 2019-01-18 15:45:08 +01:00
clk stm32mp1: add minimal support for co-processor Cortex-M4 2019-02-20 17:34:21 +01:00
ddr stm32mp1: update clock driver 2019-02-14 11:20:23 +01:00
gpio stm32mp1: split clkfunc code 2019-02-14 11:20:23 +01:00
i2c stm32mp1: update I2C and PMIC drivers 2019-02-14 11:20:23 +01:00
io drivers: st: update drivers code 2019-01-18 15:45:08 +01:00
mmc stm32mp1: update clock driver 2019-02-14 11:20:23 +01:00
pmic stm32mp1: update I2C and PMIC drivers 2019-02-14 11:20:23 +01:00
reset stm32mp1: add timeout detection in reset driver 2019-02-14 11:20:23 +01:00
uart/aarch32 Sanitise includes across codebase 2019-01-04 10:43:17 +00:00