Manish Pandey f2d6b4ee57 Neovers N1: added support to update presence of External LLC ... CPUECTLR_EL1.EXTLLC bit indicates the presense of internal or external last level cache(LLC) in the system, the reset value is internal LLC. To cater for the platforms(like N1SDP) which has external LLC present introduce a new build option 'NEOVERSE_N1_EXTERNAL_LLC' which can be enabled by platform port. Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: Ibf475fcd6fd44401897a71600f4eafe989921363		2020-01-27 14:44:35 +00:00
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aarch32	Cortex A9:errata 794073 workaround	2019-04-12 10:10:32 +00:00
aarch64	Neovers N1: added support to update presence of External LLC	2020-01-27 14:44:35 +00:00
cpu-ops.mk	Neovers N1: added support to update presence of External LLC	2020-01-27 14:44:35 +00:00
errata_report.c	Switch AARCH32/AARCH64 to __aarch64__	2019-08-01 13:45:03 -07:00