Etienne Carriere 86606eb51e cpu log buffer size depends on cache line size ... Platform may use specific cache line sizes. Since CACHE_WRITEBACK_GRANULE defines the platform specific cache line size, it is used to define the size of the cpu data structure CPU_DATA_SIZE aligned on cache line size. Introduce assembly macro 'mov_imm' for AArch32 to simplify implementation of function '_cpu_data_by_index'. Change-Id: Ic2d49ffe0c3e51649425fd9c8c99559c582ac5a1 Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>		2017-09-01 10:22:20 +02:00
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asm_macros.S	cpu log buffer size depends on cache line size	2017-09-01 10:22:20 +02:00
assert_macros.S	Use SPDX license identifiers	2017-05-03 09:39:28 +01:00
el3_common_macros.S	Fully initialise essential control registers	2017-06-21 17:57:54 +01:00