Upstream fork of ATF with a couple of rk3399 patches to remove HDCP blob and increase BAUD_RATE.
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Pritesh Raithatha a391d4942a Tegra: smmu: remove context save sequence
SMMU and MC registers are saved as part of the System Suspend sequence.
The register list includes some NS world SMMU registers that need to be
saved by NS world software instead. All that remains as a result are
the MC registers.

This patch moves code to MC file as a result and renames all the
variables and defines to use the MC prefix instead of SMMU. The
Tegra186 and Tegra194 platform ports are updated to provide the MC
context register list to the parent driver. The memory required for
context save is reduced due to removal of the SMMU registers.

Change-Id: I83a05079039f52f9ce91c938ada6cd6dfd9c843f
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
2020-03-11 13:37:26 -07:00
bl1 Factor xlat_table sections in linker scripts out into a header file 2020-03-11 11:31:46 +09:00
bl2 Factor xlat_table sections in linker scripts out into a header file 2020-03-11 11:31:46 +09:00
bl2u Factor xlat_table sections in linker scripts out into a header file 2020-03-11 11:31:46 +09:00
bl31 Merge "Fix crash dump for lower EL" into integration 2020-03-11 15:39:32 +00:00
bl32 Factor xlat_table sections in linker scripts out into a header file 2020-03-11 11:31:46 +09:00
common Fix crash dump for lower EL 2020-03-06 14:17:35 +00:00
docs Merge "Fix crash dump for lower EL" into integration 2020-03-11 15:39:32 +00:00
drivers Merge "TF-A GICv3 driver: Separate GICD and GICR accessor functions" into integration 2020-03-11 15:38:45 +00:00
fdts fdts: a5ds: add ethernet node in devicetree 2020-03-04 14:53:37 +00:00
include Merge "Fix crash dump for lower EL" into integration 2020-03-11 15:39:32 +00:00
lib xlat_tables_v2: merge REGISTER_XLAT_CONTEXT_{FULL_SPEC,RO_BASE_TABLE} 2020-03-11 11:31:46 +09:00
make_helpers Merge changes from topic "sb/dualroot" into integration 2020-03-10 13:47:47 +00:00
plat Tegra: smmu: remove context save sequence 2020-03-11 13:37:26 -07:00
services SPMD: add command line parameter to run SPM at S-EL2 or S-EL1 2020-03-03 11:38:36 +00:00
tools Merge changes from topic "sb/dualroot" into integration 2020-03-10 13:47:47 +00:00
.checkpatch.conf Re-apply GIT_COMMIT_ID check for checkpatch 2019-07-12 11:06:24 +01:00
.editorconfig doc: Final, pre-release fixes and updates 2019-10-22 13:15:02 +00:00
.gitignore Ignore the ctags file 2020-01-22 16:08:27 +00:00
Makefile Makefile: Add support to optionally encrypt BL31 and BL32 2020-03-06 16:40:37 +05:30
dco.txt Drop requirement for CLA in contribution.md 2016-09-27 21:52:03 +01:00
license.rst doc: De-duplicate readme and license files 2019-10-08 16:36:15 +00:00
readme.rst doc: Formatting fixes for readme.rst 2019-10-09 15:37:59 +00:00

readme.rst

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Trusted Firmware-A

Trusted Firmware-A (TF-A) is a reference implementation of secure world software for Arm A-Profile architectures (Armv8-A and Armv7-A), including an Exception Level 3 (EL3) Secure Monitor. It provides a suitable starting point for productization of secure world boot and runtime firmware, in either the AArch32 or AArch64 execution states.

TF-A implements Arm interface standards, including:

The code is designed to be portable and reusable across hardware platforms and software models that are based on the Armv8-A and Armv7-A architectures.

In collaboration with interested parties, we will continue to enhance TF-A with reference implementations of Arm standards to benefit developers working with Armv7-A and Armv8-A TrustZone technology.

Users are encouraged to do their own security validation, including penetration testing, on any secure world code derived from TF-A.

More Info and Documentation

To find out more about Trusted Firmware-A, please view the full documentation that is available through trustedfirmware.org.


Copyright (c) 2013-2019, Arm Limited and Contributors. All rights reserved.

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