a7521bd5d8
Older Qualcomm SoCs seem to have a custom Qualcomm implementation of the GICv2 specification. It's mostly compliant but unfortunately it looks like a mistake was made with the GICD_PIDR registers. PIDR2 is defined to be at offset 0xFE8, but the Qualcomm implementation has it at 0xFD8. It looks like the entire PIDR0-3/4-7 block is swapped compared to the ARM implementation: PIDR0 starts at 0xFD0 (instead of 0xFE0) and PIDR4 starts at 0xFE0 (instead of 0xFD0). Actually this only breaks a single assert in gicv2_main.c that checks the GIC version: assert((gic_version == ARCH_REV_GICV2) ... In release mode everything seems to work correctly. To keep the code generic, allow affected platforms to override the GICD_PIDR2_GICV2 register address in platform_def.h. Since this header is typically included very early (e.g. from assert.h), add an #ifndef so the definitions from platform_def.h takes priority. Change-Id: I2929a8c1726f8d751bc28796567eb30b81eca2fe Signed-off-by: Stephan Gerhold <stephan@gerhold.net> |
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