228 lines
5.6 KiB
C
228 lines
5.6 KiB
C
/*
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* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <assert.h>
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#include <debug.h>
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#include <delay_timer.h>
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#include <errno.h>
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#include <gpio.h>
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#include <mmio.h>
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#include <platform.h>
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#include <platform_def.h>
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#include <plat_private.h>
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#include <soc.h>
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uint32_t gpio_port[] = {
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GPIO0_BASE,
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GPIO1_BASE,
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GPIO2_BASE,
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GPIO3_BASE,
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GPIO4_BASE,
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};
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#define SWPORTA_DR 0x00
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#define SWPORTA_DDR 0x04
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#define EXT_PORTA 0x50
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#define PMU_GPIO_PORT0 0
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#define PMU_GPIO_PORT1 1
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#define PMU_GRF_GPIO0A_P 0x40
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#define GRF_GPIO2A_P 0xe040
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#define GPIO_P_MASK 0x03
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/*
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* gpio clock disabled when not operate
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* so need to enable gpio clock before operate gpio
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* after setting, need to disable gpio clock
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* gate 1: disable clock; 0: enable clock
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*/
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static void gpio_clk(int gpio, uint32_t gate)
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{
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uint32_t port = gpio / 32;
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assert(port < 5);
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switch (port) {
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case 0:
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mmio_write_32(PMUCRU_BASE + CRU_PMU_CLKGATE_CON(1),
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BITS_WITH_WMASK(gate, CLK_GATE_MASK,
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PCLK_GPIO0_GATE_SHIFT));
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break;
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case 1:
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mmio_write_32(PMUCRU_BASE + CRU_PMU_CLKGATE_CON(1),
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BITS_WITH_WMASK(gate, CLK_GATE_MASK,
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PCLK_GPIO1_GATE_SHIFT));
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break;
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case 2:
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mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31),
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BITS_WITH_WMASK(gate, CLK_GATE_MASK,
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PCLK_GPIO2_GATE_SHIFT));
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break;
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case 3:
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mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31),
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BITS_WITH_WMASK(gate, CLK_GATE_MASK,
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PCLK_GPIO3_GATE_SHIFT));
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break;
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case 4:
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mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31),
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BITS_WITH_WMASK(gate, CLK_GATE_MASK,
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PCLK_GPIO4_GATE_SHIFT));
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break;
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default:
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break;
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}
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}
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static void set_pull(int gpio, int pull)
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{
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uint32_t port = gpio / 32;
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uint32_t num = gpio % 32;
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uint32_t bank = num / 8;
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uint32_t id = num % 8;
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assert((port < 5) && (num < 32));
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gpio_clk(gpio, 0);
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/*
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* in gpio0a, gpio0b, gpio2c, gpio2d,
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* 00: Z
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* 01: pull down
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* 10: Z
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* 11: pull up
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* different with other gpio, so need to correct it
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*/
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if (((port == 0) && (bank < 2)) || ((port == 2) && (bank > 2))) {
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if (pull == GPIO_PULL_UP)
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pull = 3;
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else if (pull == GPIO_PULL_DOWN)
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pull = 1;
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else
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pull = 0;
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}
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if (port == PMU_GPIO_PORT0 || port == PMU_GPIO_PORT1) {
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mmio_write_32(PMUGRF_BASE + PMU_GRF_GPIO0A_P +
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port * 16 + bank * 4,
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BITS_WITH_WMASK(pull, GPIO_P_MASK, id * 2));
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} else {
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mmio_write_32(GRF_BASE + GRF_GPIO2A_P +
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(port - 2) * 16 + bank * 4,
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BITS_WITH_WMASK(pull, GPIO_P_MASK, id * 2));
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}
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gpio_clk(gpio, 1);
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}
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static void set_direction(int gpio, int direction)
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{
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uint32_t port = gpio / 32;
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uint32_t num = gpio % 32;
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assert((port < 5) && (num < 32));
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gpio_clk(gpio, 0);
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/*
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* in gpio.h
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* #define GPIO_DIR_OUT 0
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* #define GPIO_DIR_IN 1
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* but rk3399 gpio direction 1: output, 0: input
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* so need to revert direction value
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*/
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mmio_setbits_32(gpio_port[port] + SWPORTA_DDR, !direction << num);
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gpio_clk(gpio, 1);
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}
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static int get_direction(int gpio)
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{
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uint32_t port = gpio / 32;
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uint32_t num = gpio % 32;
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int direction;
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assert((port < 5) && (num < 32));
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gpio_clk(gpio, 0);
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/*
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* in gpio.h
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* #define GPIO_DIR_OUT 0
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* #define GPIO_DIR_IN 1
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* but rk3399 gpio direction 1: output, 0: input
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* so need to revert direction value
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*/
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direction = !((mmio_read_32(gpio_port[port] +
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SWPORTA_DDR) >> num) & 0x1);
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gpio_clk(gpio, 1);
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return direction;
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}
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static int get_value(int gpio)
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{
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uint32_t port = gpio / 32;
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uint32_t num = gpio % 32;
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int value;
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assert((port < 5) && (num < 32));
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gpio_clk(gpio, 0);
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value = (mmio_read_32(gpio_port[port] + EXT_PORTA) >> num) & 0x1;
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gpio_clk(gpio, 1);
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return value;
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}
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static void set_value(int gpio, int value)
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{
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uint32_t port = gpio / 32;
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uint32_t num = gpio % 32;
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assert((port < 5) && (num < 32));
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gpio_clk(gpio, 0);
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mmio_clrsetbits_32(gpio_port[port] + SWPORTA_DR, 1 << num,
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!!value << num);
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gpio_clk(gpio, 0);
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}
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const gpio_ops_t rk3399_gpio_ops = {
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.get_direction = get_direction,
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.set_direction = set_direction,
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.get_value = get_value,
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.set_value = set_value,
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.set_pull = set_pull,
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};
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void plat_rockchip_gpio_init(void)
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{
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gpio_init(&rk3399_gpio_ops);
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}
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