135 lines
5.0 KiB
ArmAsm
135 lines
5.0 KiB
ArmAsm
/*
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* Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <arch.h>
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#include <bl_common.h>
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#include <el3_common_macros.S>
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.globl bl31_entrypoint
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/* -----------------------------------------------------
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* bl31_entrypoint() is the cold boot entrypoint,
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* executed only by the primary cpu.
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* -----------------------------------------------------
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*/
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func bl31_entrypoint
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#if !RESET_TO_BL31
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/* ---------------------------------------------------------------
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* Preceding bootloader has populated x0 with a pointer to a
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* 'bl31_params' structure & x1 with a pointer to platform
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* specific structure
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* ---------------------------------------------------------------
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*/
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mov x20, x0
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mov x21, x1
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/* ---------------------------------------------------------------------
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* For !RESET_TO_BL31 systems, only the primary CPU ever reaches
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* bl31_entrypoint() during the cold boot flow, so the cold/warm boot
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* and primary/secondary CPU logic should not be executed in this case.
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*
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* Also, assume that the previous bootloader has already set up the CPU
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* endianness and has initialised the memory.
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* ---------------------------------------------------------------------
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*/
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el3_entrypoint_common \
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_set_endian=0 \
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_warm_boot_mailbox=0 \
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_secondary_cold_boot=0 \
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_init_memory=0 \
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_init_c_runtime=1 \
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_exception_vectors=runtime_exceptions
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/* ---------------------------------------------------------------------
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* Relay the previous bootloader's arguments to the platform layer
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* ---------------------------------------------------------------------
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*/
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mov x0, x20
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mov x1, x21
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#else
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/* ---------------------------------------------------------------------
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* For RESET_TO_BL31 systems which have a programmable reset address,
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* bl31_entrypoint() is executed only on the cold boot path so we can
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* skip the warm boot mailbox mechanism.
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* ---------------------------------------------------------------------
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*/
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el3_entrypoint_common \
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_set_endian=1 \
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_warm_boot_mailbox=!PROGRAMMABLE_RESET_ADDRESS \
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_secondary_cold_boot=!COLD_BOOT_SINGLE_CPU \
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_init_memory=1 \
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_init_c_runtime=1 \
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_exception_vectors=runtime_exceptions
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/* ---------------------------------------------------------------------
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* For RESET_TO_BL31 systems, BL3-1 is the first bootloader to run so
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* there's no argument to relay from a previous bootloader. Zero the
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* arguments passed to the platform layer to reflect that.
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* ---------------------------------------------------------------------
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*/
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mov x0, 0
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mov x1, 0
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#endif /* RESET_TO_BL31 */
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/* ---------------------------------------------
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* Perform platform specific early arch. setup
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* ---------------------------------------------
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*/
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bl bl31_early_platform_setup
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bl bl31_plat_arch_setup
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/* ---------------------------------------------
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* Jump to main function.
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* ---------------------------------------------
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*/
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bl bl31_main
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/* -------------------------------------------------------------
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* Clean the .data & .bss sections to main memory. This ensures
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* that any global data which was initialised by the primary CPU
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* is visible to secondary CPUs before they enable their data
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* caches and participate in coherency.
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* -------------------------------------------------------------
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*/
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adr x0, __DATA_START__
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adr x1, __DATA_END__
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sub x1, x1, x0
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bl clean_dcache_range
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adr x0, __BSS_START__
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adr x1, __BSS_END__
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sub x1, x1, x0
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bl clean_dcache_range
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b el3_exit
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endfunc bl31_entrypoint
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