38 lines
797 B
C
38 lines
797 B
C
/*
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* Copyright (C) 2021 Marvell International Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* https://spdx.org/licenses
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*/
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#include <platform_def.h>
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#include <common/bl_common.h>
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#include <common/debug.h>
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#include <lib/mmio.h>
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#include <armada_common.h>
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#include "mss_defs.h"
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void mss_start_cp_cm3(int cp)
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{
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uint32_t magic;
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uintptr_t sram = MVEBU_CP_REGS_BASE(cp) + MSS_CP_SRAM_OFFSET;
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uintptr_t regs = MVEBU_CP_REGS_BASE(cp) + MSS_CP_REGS_OFFSET;
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magic = mmio_read_32(sram);
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/* Make sure the FW was loaded */
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if (magic != MSS_FW_READY_MAGIC) {
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return;
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}
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NOTICE("Starting CP%d MSS CPU\n", cp);
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/* remove the magic */
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mmio_write_32(sram, 0);
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/* Release M3 from reset */
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mmio_write_32(MSS_M3_RSTCR(regs),
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(MSS_M3_RSTCR_RST_OFF << MSS_M3_RSTCR_RST_OFFSET));
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}
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