Ambroise Vincent 5f2c690d0e Cortex-A15: Implement workaround for errata 827671 ... This erratum can only be worked around on revisions >= r3p0 because the register that needs to be accessed only exists in those revisions[1]. [1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0438g/CIHEAAAD.html Change-Id: I5d773547d7a09b5bd01dabcd19ceeaf53c186faa Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>		2019-03-13 14:05:47 +00:00
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aarch32	Cortex-A15: Implement workaround for errata 827671	2019-03-13 14:05:47 +00:00
aarch64	Merge pull request #1751 from vwadekar/tegra-scatter-file-support	2019-03-01 11:23:58 +00:00
cpu-ops.mk	Cortex-A15: Implement workaround for errata 827671	2019-03-13 14:05:47 +00:00
errata_report.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00