Pali Rohár ab1fe18841 marvell: uart: a3720: Fix comments in console_a3700_core_init() function ... The delay loop executes 3 instructions. These 3 instructions are executed in 2 processor ticks and 30000 iterations on a 600 MHz CPU should yield approximately 100 us. This means we are waiting 2 ms, not 20 ms, for TX FIFO to be empty. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I2cccad405bcc73cd6d1062adc0205c405c16c15f		2021-02-16 11:49:11 +01:00
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comphy	marvell: comphy: cp110: add support for USB comphy polarity invert	2020-10-04 15:56:01 +02:00
mc_trustzone	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
mg_conf_cm3	drivers: marvell: mg_conf_cm3: pass comphy lane number to AP FW	2020-07-10 10:55:09 +00:00
mochi	drivers: marvell: mochi: Update AP incoming masters secure level	2020-10-04 15:29:05 +02:00
uart	marvell: uart: a3720: Fix comments in console_a3700_core_init() function	2021-02-16 11:49:11 +01:00
amb_adec.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
ap807_clocks_init.c	ble: ap807: improve PLL configuration sequence	2020-06-07 00:06:03 +02:00
cache_llc.c	drivers: marvell: Fix the LLC SRAM driver	2020-07-10 10:55:33 +00:00
ccu.c	plat: marvell: armada: add ccu window for workaround errata-id 3033912	2020-10-04 15:23:29 +02:00
comphy.h	Standardise header guards across codebase	2018-11-08 10:20:19 +00:00
gwin.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
io_win.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
iob.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
mci.c	plat: marvell: mci: perform mci link tuning for all mci interfaces	2020-06-07 00:06:03 +02:00
thermal.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00