af220ebbe4
Cortex-A710 erratum 2008768 is a Cat B erratum that applies to revisions r0p0, r1p0, and r2p0, and is fixed in r2p1. The workaround is to clear the ED bit in each ERXCTLR_EL1 register before setting the PWRDN bit in CPUPWRCTLR_EL1. SDEN can be found here: https://developer.arm.com/documentation/SDEN1775101 Signed-off-by: John Powell <john.powell@arm.com> Change-Id: Ib2171c06da762dd4155b02c03d86766f1616381d |
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arch.h | ||
arch_features.h | ||
arch_helpers.h | ||
asm_macros.S | ||
assert_macros.S | ||
console_macros.S | ||
el2_common_macros.S | ||
el3_common_macros.S | ||
smccc_helpers.h |