arm-trusted-firmware/bl31/aarch64
Achin Gupta 754a2b7a09 Remove coherent stack usage from the cold boot path
This patch reworks the cold boot path across the BL1, BL2, BL3-1 and BL3-2 boot
loader stages to not use stacks allocated in coherent memory for early platform
setup and enabling the MMU. Stacks allocated in normal memory are used instead.

Attributes for stack memory change from nGnRnE when the MMU is disabled to
Normal WBWA Inner-shareable when the MMU and data cache are enabled. It is
possible for the CPU to read stale stack memory after the MMU is enabled from
another CPUs cache. Hence, it is unsafe to turn on the MMU and data cache while
using normal stacks when multiple CPUs are a part of the same coherency
domain. It is safe to do so in the cold boot path as only the primary cpu
executes it. The secondary cpus are in a quiescent state.

This patch does not remove the allocation of coherent stack memory. That is done
in a subsequent patch.

Change-Id: I12c80b7c7ab23506d425c5b3a8a7de693498f830
2014-07-19 23:31:50 +01:00
..
bl31_arch_setup.c Initialise CPU contexts from entry_point_info 2014-06-23 14:55:44 +01:00
bl31_entrypoint.S Remove coherent stack usage from the cold boot path 2014-07-19 23:31:50 +01:00
context.S Allow FP register context to be optional at build time 2014-07-10 11:41:44 +01:00
cpu_data.S Per-cpu data cache restructuring 2014-06-16 21:30:32 +01:00
crash_reporting.S Per-cpu data cache restructuring 2014-06-16 21:30:32 +01:00
runtime_exceptions.S Fix compilation issue for IMF_READ_INTERRUPT_ID build flag 2014-05-29 16:54:10 +01:00