231 lines
7.7 KiB
C
231 lines
7.7 KiB
C
/*
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* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <arch_helpers.h>
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#include <assert.h>
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#include <bakery_lock.h>
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#include <cpu_data.h>
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#include <platform.h>
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#include <string.h>
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/*
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* Functions in this file implement Bakery Algorithm for mutual exclusion with the
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* bakery lock data structures in cacheable and Normal memory.
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*
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* ARM architecture offers a family of exclusive access instructions to
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* efficiently implement mutual exclusion with hardware support. However, as
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* well as depending on external hardware, these instructions have defined
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* behavior only on certain memory types (cacheable and Normal memory in
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* particular; see ARMv8 Architecture Reference Manual section B2.10). Use cases
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* in trusted firmware are such that mutual exclusion implementation cannot
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* expect that accesses to the lock have the specific type required by the
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* architecture for these primitives to function (for example, not all
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* contenders may have address translation enabled).
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*
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* This implementation does not use mutual exclusion primitives. It expects
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* memory regions where the locks reside to be cacheable and Normal.
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*
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* Note that the ARM architecture guarantees single-copy atomicity for aligned
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* accesses regardless of status of address translation.
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*/
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#ifdef PLAT_PERCPU_BAKERY_LOCK_SIZE
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/*
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* Verify that the platform defined value for the per-cpu space for bakery locks is
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* a multiple of the cache line size, to prevent multiple CPUs writing to the same
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* bakery lock cache line
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*
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* Using this value, if provided, rather than the linker generated value results in
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* more efficient code
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*/
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CASSERT((PLAT_PERCPU_BAKERY_LOCK_SIZE & (CACHE_WRITEBACK_GRANULE - 1)) == 0, \
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PLAT_PERCPU_BAKERY_LOCK_SIZE_not_cacheline_multiple);
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#define PERCPU_BAKERY_LOCK_SIZE (PLAT_PERCPU_BAKERY_LOCK_SIZE)
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#else
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/*
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* Use the linker defined symbol which has evaluated the size reqiurement.
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* This is not as efficient as using a platform defined constant
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*/
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extern void *__PERCPU_BAKERY_LOCK_SIZE__;
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#define PERCPU_BAKERY_LOCK_SIZE ((uintptr_t)&__PERCPU_BAKERY_LOCK_SIZE__)
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#endif
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#define get_bakery_info(cpu_ix, lock) \
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(bakery_info_t *)((uintptr_t)lock + cpu_ix * PERCPU_BAKERY_LOCK_SIZE)
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#define write_cache_op(addr, cached) \
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do { \
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(cached ? dccvac((uint64_t)addr) :\
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dcivac((uint64_t)addr));\
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dsbish();\
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} while (0)
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#define read_cache_op(addr, cached) if (cached) \
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dccivac((uint64_t)addr)
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static unsigned int bakery_get_ticket(bakery_lock_t *lock,
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unsigned int me, int is_cached)
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{
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unsigned int my_ticket, their_ticket;
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unsigned int they;
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bakery_info_t *my_bakery_info, *their_bakery_info;
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/*
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* Obtain a reference to the bakery information for this cpu and ensure
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* it is not NULL.
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*/
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my_bakery_info = get_bakery_info(me, lock);
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assert(my_bakery_info);
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/*
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* Prevent recursive acquisition.
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* Since lock data is written to and cleaned by the owning cpu, it
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* doesn't require any cache operations prior to reading the lock data.
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*/
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assert(!bakery_ticket_number(my_bakery_info->lock_data));
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/*
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* Tell other contenders that we are through the bakery doorway i.e.
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* going to allocate a ticket for this cpu.
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*/
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my_ticket = 0;
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my_bakery_info->lock_data = make_bakery_data(CHOOSING_TICKET, my_ticket);
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write_cache_op(my_bakery_info, is_cached);
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/*
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* Iterate through the bakery information of each contender to allocate
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* the highest ticket number for this cpu.
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*/
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for (they = 0; they < BAKERY_LOCK_MAX_CPUS; they++) {
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if (me == they)
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continue;
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/*
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* Get a reference to the other contender's bakery info and
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* ensure that a stale copy is not read.
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*/
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their_bakery_info = get_bakery_info(they, lock);
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assert(their_bakery_info);
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read_cache_op(their_bakery_info, is_cached);
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/*
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* Update this cpu's ticket number if a higher ticket number is
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* seen
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*/
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their_ticket = bakery_ticket_number(their_bakery_info->lock_data);
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if (their_ticket > my_ticket)
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my_ticket = their_ticket;
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}
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/*
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* Compute ticket; then signal to other contenders waiting for us to
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* finish calculating our ticket value that we're done
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*/
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++my_ticket;
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my_bakery_info->lock_data = make_bakery_data(CHOSEN_TICKET, my_ticket);
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write_cache_op(my_bakery_info, is_cached);
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return my_ticket;
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}
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void bakery_lock_get(bakery_lock_t *lock)
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{
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unsigned int they, me, is_cached;
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unsigned int my_ticket, my_prio, their_ticket;
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bakery_info_t *their_bakery_info;
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unsigned int their_bakery_data;
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me = plat_my_core_pos();
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is_cached = read_sctlr_el3() & SCTLR_C_BIT;
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/* Get a ticket */
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my_ticket = bakery_get_ticket(lock, me, is_cached);
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/*
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* Now that we got our ticket, compute our priority value, then compare
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* with that of others, and proceed to acquire the lock
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*/
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my_prio = PRIORITY(my_ticket, me);
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for (they = 0; they < BAKERY_LOCK_MAX_CPUS; they++) {
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if (me == they)
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continue;
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/*
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* Get a reference to the other contender's bakery info and
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* ensure that a stale copy is not read.
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*/
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their_bakery_info = get_bakery_info(they, lock);
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assert(their_bakery_info);
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/* Wait for the contender to get their ticket */
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do {
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read_cache_op(their_bakery_info, is_cached);
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their_bakery_data = their_bakery_info->lock_data;
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} while (bakery_is_choosing(their_bakery_data));
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/*
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* If the other party is a contender, they'll have non-zero
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* (valid) ticket value. If they do, compare priorities
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*/
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their_ticket = bakery_ticket_number(their_bakery_data);
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if (their_ticket && (PRIORITY(their_ticket, they) < my_prio)) {
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/*
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* They have higher priority (lower value). Wait for
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* their ticket value to change (either release the lock
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* to have it dropped to 0; or drop and probably content
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* again for the same lock to have an even higher value)
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*/
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do {
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wfe();
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read_cache_op(their_bakery_info, is_cached);
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} while (their_ticket
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== bakery_ticket_number(their_bakery_info->lock_data));
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}
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}
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/* Lock acquired */
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}
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void bakery_lock_release(bakery_lock_t *lock)
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{
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bakery_info_t *my_bakery_info;
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unsigned int is_cached = read_sctlr_el3() & SCTLR_C_BIT;
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my_bakery_info = get_bakery_info(plat_my_core_pos(), lock);
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assert(bakery_ticket_number(my_bakery_info->lock_data));
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my_bakery_info->lock_data = 0;
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write_cache_op(my_bakery_info, is_cached);
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sev();
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}
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