24 lines
532 B
C
24 lines
532 B
C
/*
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* Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2019, Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef PLAT_SOCFPGA_DEF_H
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#define PLAT_SOCFPGA_DEF_H
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#include <platform_def.h>
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/* Platform Setting */
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#define PLATFORM_MODEL PLAT_SOCFPGA_AGILEX
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/* Register Mapping */
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#define SOCFPGA_MMC_REG_BASE 0xff808000
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#define SOCFPGA_RSTMGR_OFST 0xffd11000
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#define SOCFPGA_RSTMGR_MPUMODRST_OFST 0xffd11020
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#endif /* PLAT_SOCFPGA_DEF_H */
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