Marek Behún b662232d18 drivers: marvell: comphy-a3700: fix USB3 powering on when on lane 2 ... When USB3 is on lane 2 and indirect register access is used, the polling at the end of the mvebu_a3700_comphy_usb3_power_on function is incorrect. The LOOPBACK_REG0 register should not be used at all. Instead we have to write the LANE_STATUS1 register address (with offset USB3PHY_LANE2_REG_BASE_OFFSET) into the indirect address register and then we should poll indirect data register. This fixes problems on Turris Mox, which uses lane 2 for USB3. Signed-off-by: Marek Behún <marek.behun@nic.cz> Change-Id: I968b0cccee5ddbe10a2b5614e52e52d87682aacd		2019-12-11 14:23:27 +00:00
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comphy-cp110.h	Standardise header guards across codebase	2018-11-08 10:20:19 +00:00
phy-comphy-3700.c	drivers: marvell: comphy-a3700: fix USB3 powering on when on lane 2	2019-12-11 14:23:27 +00:00
phy-comphy-3700.h	Standardise header guards across codebase	2018-11-08 10:20:19 +00:00
phy-comphy-common.h	mvebu: cp110: avoid pcie power on/off sequence when called from Linux	2018-12-04 14:09:44 +02:00
phy-comphy-cp110.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
phy-comphy-cp110.h	mvebu: cp110: avoid pcie power on/off sequence when called from Linux	2018-12-04 14:09:44 +02:00
phy-default-porting-layer.h	Standardise header guards across codebase	2018-11-08 10:20:19 +00:00