79 lines
1.5 KiB
C
79 lines
1.5 KiB
C
/*
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* Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arm_def.h>
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#include <plat_arm.h>
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/*
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* Table of memory regions for different BL stages to map using the MMU.
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* This doesn't include Trusted SRAM as arm_setup_page_tables() already
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* takes care of mapping it.
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*/
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#ifdef IMAGE_BL1
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const mmap_region_t plat_arm_mmap[] = {
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ARM_MAP_SHARED_RAM,
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V2M_MAP_FLASH0_RO,
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V2M_MAP_IOFPGA,
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CSS_MAP_DEVICE,
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SOC_CSS_MAP_DEVICE,
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#if TRUSTED_BOARD_BOOT
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ARM_MAP_NS_DRAM1,
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#endif
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{0}
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};
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#endif
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#ifdef IMAGE_BL2
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const mmap_region_t plat_arm_mmap[] = {
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ARM_MAP_SHARED_RAM,
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V2M_MAP_FLASH0_RO,
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V2M_MAP_IOFPGA,
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CSS_MAP_DEVICE,
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SOC_CSS_MAP_DEVICE,
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ARM_MAP_NS_DRAM1,
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ARM_MAP_TSP_SEC_MEM,
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{0}
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};
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#endif
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#ifdef IMAGE_BL2U
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const mmap_region_t plat_arm_mmap[] = {
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ARM_MAP_SHARED_RAM,
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CSS_MAP_DEVICE,
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SOC_CSS_MAP_DEVICE,
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{0}
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};
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#endif
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#ifdef IMAGE_BL31
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const mmap_region_t plat_arm_mmap[] = {
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ARM_MAP_SHARED_RAM,
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V2M_MAP_IOFPGA,
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CSS_MAP_DEVICE,
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#if CSS_USE_SCMI_DRIVER
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/*
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* The SCMI payload area is currently in the Non Secure SRAM. This is
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* a potential security risk but this will be resolved once SCP
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* completely replaces SCPI with SCMI as the only communication
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* protocol.
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*/
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CSS_MAP_NSRAM,
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#endif
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SOC_CSS_MAP_DEVICE,
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{0}
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};
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#endif
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#ifdef IMAGE_BL32
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const mmap_region_t plat_arm_mmap[] = {
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#ifdef AARCH32
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ARM_MAP_SHARED_RAM,
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#endif
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V2M_MAP_IOFPGA,
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CSS_MAP_DEVICE,
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SOC_CSS_MAP_DEVICE,
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{0}
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};
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#endif
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ARM_CASSERT_MMAP
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