104 lines
3.9 KiB
C
104 lines
3.9 KiB
C
/*
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* Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef LIB_BL_AUX_PARAMS_H
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#define LIB_BL_AUX_PARAMS_H
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#include <stdbool.h>
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#include <stdint.h>
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/*
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* This API implements a lightweight parameter passing mechanism that can be
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* used to pass SoC Firmware configuration data from BL2 to BL31 by platforms or
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* configurations that do not want to depend on libfdt. It is structured as a
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* singly-linked list of parameter structures that all share the same common
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* header but may have different (and differently-sized) structure bodies after
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* that. The header contains a type field to indicate the parameter type (which
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* is used to infer the structure length and how to interpret its contents) and
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* a next pointer which contains the absolute physical address of the next
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* parameter structure. The next pointer in the last structure block is set to
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* NULL. The picture below shows how the parameters are kept in memory.
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*
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* head of list ---> +----------------+ --+
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* | type | |
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* +----------------+ |--> struct bl_aux_param
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* +----| next | |
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* | +----------------+ --+
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* | | parameter data |
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* | +----------------+
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* |
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* +--> +----------------+ --+
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* | type | |
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* +----------------+ |--> struct bl_aux_param
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* NULL <---| next | |
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* +----------------+ --+
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* | parameter data |
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* +----------------+
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*
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* Note: The SCTLR_EL3.A bit (Alignment fault check enable) is set in TF-A, so
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* BL2 must ensure that each parameter struct starts on a 64-bit aligned address
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* to avoid alignment faults. Parameters may be allocated in any address range
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* accessible at the time of BL31 handoff (e.g. SRAM, DRAM, SoC-internal scratch
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* registers, etc.), in particular address ranges that may not be mapped in
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* BL31's page tables, so the parameter list must be parsed before the MMU is
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* enabled and any information that is required at a later point should be
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* deep-copied out into BL31-internal data structures.
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*/
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enum bl_aux_param_type {
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BL_AUX_PARAM_NONE = 0,
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BL_AUX_PARAM_VENDOR_SPECIFIC_FIRST = 0x1,
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/* 0x1 - 0x7fffffff can be used by vendor-specific handlers. */
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BL_AUX_PARAM_VENDOR_SPECIFIC_LAST = 0x7fffffff,
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BL_AUX_PARAM_GENERIC_FIRST = 0x80000001,
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BL_AUX_PARAM_COREBOOT_TABLE = BL_AUX_PARAM_GENERIC_FIRST,
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/* 0x80000001 - 0xffffffff are reserved for the generic handler. */
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BL_AUX_PARAM_GENERIC_LAST = 0xffffffff,
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/* Top 32 bits of the type field are reserved for future use. */
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};
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/* common header for all BL aux parameters */
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struct bl_aux_param_header {
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uint64_t type;
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uint64_t next;
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};
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/* commonly useful parameter structures that can be shared by multiple types */
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struct bl_aux_param_uint64 {
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struct bl_aux_param_header h;
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uint64_t value;
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};
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struct bl_aux_gpio_info {
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uint8_t polarity;
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uint8_t direction;
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uint8_t pull_mode;
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uint8_t reserved;
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uint32_t index;
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};
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struct bl_aux_param_gpio {
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struct bl_aux_param_header h;
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struct bl_aux_gpio_info gpio;
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};
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/*
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* Handler function that handles an individual aux parameter. Return true if
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* the parameter was handled, and flase if bl_aux_params_parse() should make its
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* own attempt at handling it (for generic parameters).
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*/
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typedef bool (*bl_aux_param_handler_t)(struct bl_aux_param_header *param);
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/*
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* Interprets head as the start of an aux parameter list, and passes the
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* parameters individually to handler(). Handles generic parameters directly if
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* handler() hasn't already done so. If only generic parameters are expected,
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* handler() can be NULL.
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*/
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void bl_aux_params_parse(u_register_t head,
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bl_aux_param_handler_t handler);
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#endif /* LIB_BL_AUX_PARAMS_H */
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