109 lines
3.1 KiB
ArmAsm
109 lines
3.1 KiB
ArmAsm
/*
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* Copyright (c) 2022, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arch.h>
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#include <asm_macros.S>
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#include <services/arm_arch_svc.h>
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#include "wa_cve_2022_23960_bhb.S"
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/*
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* This macro is used to isolate the vector table for relevant CPUs
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* used in the mitigation for CVE_2022_23960.
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*/
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.macro wa_cve_2022_23960_bhb_vector_table _bhb_loop_count, _cpu
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.globl wa_cve_vbar_\_cpu
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vector_base wa_cve_vbar_\_cpu
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/* ---------------------------------------------------------------------
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* Current EL with SP_EL0 : 0x0 - 0x200
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* ---------------------------------------------------------------------
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*/
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vector_entry bhb_sync_exception_sp_el0_\_cpu
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b sync_exception_sp_el0
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end_vector_entry bhb_sync_exception_sp_el0_\_cpu
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vector_entry bhb_irq_sp_el0_\_cpu
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b irq_sp_el0
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end_vector_entry bhb_irq_sp_el0_\_cpu
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vector_entry bhb_fiq_sp_el0_\_cpu
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b fiq_sp_el0
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end_vector_entry bhb_fiq_sp_el0_\_cpu
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vector_entry bhb_serror_sp_el0_\_cpu
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b serror_sp_el0
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end_vector_entry bhb_serror_sp_el0_\_cpu
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/* ---------------------------------------------------------------------
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* Current EL with SP_ELx: 0x200 - 0x400
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* ---------------------------------------------------------------------
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*/
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vector_entry bhb_sync_exception_sp_elx_\_cpu
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b sync_exception_sp_elx
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end_vector_entry bhb_sync_exception_sp_elx_\_cpu
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vector_entry bhb_irq_sp_elx_\_cpu
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b irq_sp_elx
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end_vector_entry bhb_irq_sp_elx_\_cpu
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vector_entry bhb_fiq_sp_elx_\_cpu
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b fiq_sp_elx
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end_vector_entry bhb_fiq_sp_elx_\_cpu
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vector_entry bhb_serror_sp_elx_\_cpu
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b serror_sp_elx
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end_vector_entry bhb_serror_sp_elx_\_cpu
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/* ---------------------------------------------------------------------
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* Lower EL using AArch64 : 0x400 - 0x600
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* ---------------------------------------------------------------------
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*/
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vector_entry bhb_sync_exception_aarch64_\_cpu
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apply_cve_2022_23960_bhb_wa \_bhb_loop_count
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b sync_exception_aarch64
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end_vector_entry bhb_sync_exception_aarch64_\_cpu
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vector_entry bhb_irq_aarch64_\_cpu
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apply_cve_2022_23960_bhb_wa \_bhb_loop_count
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b irq_aarch64
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end_vector_entry bhb_irq_aarch64_\_cpu
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vector_entry bhb_fiq_aarch64_\_cpu
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apply_cve_2022_23960_bhb_wa \_bhb_loop_count
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b fiq_aarch64
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end_vector_entry bhb_fiq_aarch64_\_cpu
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vector_entry bhb_serror_aarch64_\_cpu
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apply_cve_2022_23960_bhb_wa \_bhb_loop_count
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b serror_aarch64
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end_vector_entry bhb_serror_aarch64_\_cpu
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/* ---------------------------------------------------------------------
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* Lower EL using AArch32 : 0x600 - 0x800
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* ---------------------------------------------------------------------
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*/
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vector_entry bhb_sync_exception_aarch32_\_cpu
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apply_cve_2022_23960_bhb_wa \_bhb_loop_count
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b sync_exception_aarch32
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end_vector_entry bhb_sync_exception_aarch32_\_cpu
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vector_entry bhb_irq_aarch32_\_cpu
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apply_cve_2022_23960_bhb_wa \_bhb_loop_count
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b irq_aarch32
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end_vector_entry bhb_irq_aarch32_\_cpu
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vector_entry bhb_fiq_aarch32_\_cpu
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apply_cve_2022_23960_bhb_wa \_bhb_loop_count
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b fiq_aarch32
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end_vector_entry bhb_fiq_aarch32_\_cpu
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vector_entry bhb_serror_aarch32_\_cpu
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apply_cve_2022_23960_bhb_wa \_bhb_loop_count
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b serror_aarch32
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end_vector_entry bhb_serror_aarch32_\_cpu
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.endm
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