37 lines
985 B
C
37 lines
985 B
C
/*
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* Copyright (c) 2021, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef SGI_DMC620_TZC_REGIONS_H
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#define SGI_DMC620_TZC_REGIONS_H
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#include <drivers/arm/tzc_dmc620.h>
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#if SPM_MM
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#define CSS_SGI_DMC620_TZC_REGIONS_DEF \
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{ \
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.region_base = ARM_AP_TZC_DRAM1_BASE, \
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.region_top = PLAT_SP_IMAGE_NS_BUF_BASE - 1, \
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.sec_attr = TZC_DMC620_REGION_S_RDWR \
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}, { \
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.region_base = PLAT_SP_IMAGE_NS_BUF_BASE, \
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.region_top = PLAT_ARM_SP_IMAGE_STACK_BASE - 1, \
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.sec_attr = TZC_DMC620_REGION_S_NS_RDWR \
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}, { \
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.region_base = PLAT_ARM_SP_IMAGE_STACK_BASE, \
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.region_top = ARM_AP_TZC_DRAM1_END, \
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.sec_attr = TZC_DMC620_REGION_S_RDWR \
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}
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#else
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#define CSS_SGI_DMC620_TZC_REGIONS_DEF \
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{ \
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.region_base = ARM_AP_TZC_DRAM1_BASE, \
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.region_top = ARM_AP_TZC_DRAM1_END, \
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.sec_attr = TZC_DMC620_REGION_S_RDWR \
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}
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#endif /* SPM_MM */
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#endif /* SGI_DMC620_TZC_REGIONS_H */
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