75 lines
1.8 KiB
C
75 lines
1.8 KiB
C
/*
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* Copyright 2020-2022 NXP
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef IMX_CSU_H
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#define IMX_CSU_H
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#include <lib/utils_def.h>
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#include <platform_def.h>
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#define CSU_SEC_LEVEL_0 0xff
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#define CSU_SEC_LEVEL_1 0xbb
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#define CSU_SEC_LEVEL_2 0x3f
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#define CSU_SEC_LEVEL_3 0x3b
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#define CSU_SEC_LEVEL_4 0x33
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#define CSU_SEC_LEVEL_5 0x22
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#define CSU_SEC_LEVEL_6 0x03
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#define CSU_SEC_LEVEL_7 0x0
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#define LOCKED 0x1
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#define UNLOCKED 0x0
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#define CSLx_REG(x) (IMX_CSU_BASE + ((x) / 2) * 4)
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#define CSLx_LOCK(x) ((0x1 << (((x) % 2) * 16 + 8)))
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#define CSLx_CFG(x, n) ((x) << (((n) % 2) * 16))
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#define CSU_HP_REG(x) (IMX_CSU_BASE + ((x) / 16) * 4 + 0x200)
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#define CSU_HP_LOCK(x) ((0x1 << (((x) % 16) * 2 + 1)))
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#define CSU_HP_CFG(x, n) ((x) << (((n) % 16) * 2))
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#define CSU_SA_REG(x) (IMX_CSU_BASE + 0x218)
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#define CSU_SA_LOCK(x) ((0x1 << (((x) % 16) * 2 + 1)))
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#define CSU_SA_CFG(x, n) ((x) << (((n) % 16) * 2))
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#define CSU_HPCONTROL_REG(x) (IMX_CSU_BASE + (((x) / 16) * 4) + 0x358)
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#define CSU_HPCONTROL_LOCK(x) ((0x1 << (((x) % 16) * 2 + 1)))
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#define CSU_HPCONTROL_CFG(x, n) ((x) << (((n) % 16) * 2))
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enum csu_cfg_type {
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CSU_INVALID,
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CSU_CSL,
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CSU_HP,
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CSU_SA,
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CSU_HPCONTROL,
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};
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struct imx_csu_cfg {
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enum csu_cfg_type type;
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uint16_t idx;
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uint16_t lock : 1;
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uint16_t csl_level : 8;
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uint16_t hp : 1;
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uint16_t sa : 1;
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uint16_t hpctrl : 1;
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};
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#define CSU_CSLx(i, level, lk) \
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{CSU_CSL, .idx = (i), .csl_level = (level), .lock = (lk),}
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#define CSU_HPx(i, val, lk) \
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{CSU_HP, .idx = (i), .hp = (val), .lock = (lk), }
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#define CSU_SA(i, val, lk) \
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{CSU_SA, .idx = (i), .sa = (val), .lock = (lk), }
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#define CSU_HPCTRL(i, val, lk) \
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{CSU_HPCONTROL, .idx = (i), .hpctrl = (val), .lock = (lk), }
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void imx_csu_init(const struct imx_csu_cfg *csu_cfg);
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#endif /* IMX_CSU_H */
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