Upstream fork of ATF with a couple of rk3399 patches to remove HDCP blob and increase BAUD_RATE.
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Grzegorz Jaszczyk c3c51b3283 plat: marvell: ap807: update configuration space of each CP
By default all external CPs start with configuration address space set to
0xf200_0000. To overcome this issue, go in the loop and initialize the
CP one by one, using temporary window configuration which allows to access
each CP and update its configuration space according to decoding
windows scheme defined for each platform.

In case of cn9130 after this procedure bellow addresses will be used:
CP0 - f2000000
CP1 - f4000000
CP2 - f6000000

When the re-configuration is done there is need to restore previous
decoding window configuration(init_io_win).

Change-Id: I1a652bfbd0bf7106930a7a4e949094dc9078a981
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
2020-06-07 00:06:03 +02:00
bl1 linker_script: move .data section to bl_common.ld.h 2020-04-25 20:09:08 +09:00
bl2 linker_script: move .data section to bl_common.ld.h 2020-04-25 20:09:08 +09:00
bl2u linker_script: move .data section to bl_common.ld.h 2020-04-25 20:09:08 +09:00
bl31 linker_script: move .data section to bl_common.ld.h 2020-04-25 20:09:08 +09:00
bl32 linker_script: move .data section to bl_common.ld.h 2020-04-25 20:09:08 +09:00
common plat/fvp: Support for extracting UART serial node info from DT 2020-05-20 21:41:50 -05:00
docs marvell: armada: add extra level in marvell platform hierarchy 2020-06-07 00:06:03 +02:00
drivers plat: marvell: ap807: update configuration space of each CP 2020-06-07 00:06:03 +02:00
fdts dts: stm32mp157c: fix etzpc node location in DTSI file 2020-06-03 18:14:40 +02:00
include plat: marvell: ap807: update configuration space of each CP 2020-06-07 00:06:03 +02:00
lib Merge "Rename Cortex-Hercules to Cortex-A78" into integration 2020-06-03 19:26:34 +00:00
make_helpers plat/arm/fvp: Support performing SDEI platform setup in runtime 2020-05-15 10:05:06 -05:00
plat plat: marvell: ap807: update configuration space of each CP 2020-06-07 00:06:03 +02:00
services xlat_tables_v2: add base table section name parameter for spm_mm 2020-06-02 14:53:06 +09:00
tools Merge changes from topic "sb/dualroot" into integration 2020-03-10 13:47:47 +00:00
.checkpatch.conf Re-apply GIT_COMMIT_ID check for checkpatch 2019-07-12 11:06:24 +01:00
.editorconfig doc: Final, pre-release fixes and updates 2019-10-22 13:15:02 +00:00
.gitignore Ignore the ctags file 2020-01-22 16:08:27 +00:00
.gitreview Specify integration as the default branch for git-review 2020-04-02 07:57:17 +00:00
Makefile plat/arm/fvp: Support performing SDEI platform setup in runtime 2020-05-15 10:05:06 -05:00
dco.txt Drop requirement for CLA in contribution.md 2016-09-27 21:52:03 +01:00
license.rst doc: De-duplicate readme and license files 2019-10-08 16:36:15 +00:00
readme.rst doc: Formatting fixes for readme.rst 2019-10-09 15:37:59 +00:00

readme.rst

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Trusted Firmware-A

Trusted Firmware-A (TF-A) is a reference implementation of secure world software for Arm A-Profile architectures (Armv8-A and Armv7-A), including an Exception Level 3 (EL3) Secure Monitor. It provides a suitable starting point for productization of secure world boot and runtime firmware, in either the AArch32 or AArch64 execution states.

TF-A implements Arm interface standards, including:

The code is designed to be portable and reusable across hardware platforms and software models that are based on the Armv8-A and Armv7-A architectures.

In collaboration with interested parties, we will continue to enhance TF-A with reference implementations of Arm standards to benefit developers working with Armv7-A and Armv8-A TrustZone technology.

Users are encouraged to do their own security validation, including penetration testing, on any secure world code derived from TF-A.

More Info and Documentation

To find out more about Trusted Firmware-A, please view the full documentation that is available through trustedfirmware.org.


Copyright (c) 2013-2019, Arm Limited and Contributors. All rights reserved.

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