342 lines
12 KiB
C
342 lines
12 KiB
C
/*
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* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <bl32.h>
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#include <tsp.h>
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#include <arch_helpers.h>
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#include <stdio.h>
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#include <platform.h>
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#include <debug.h>
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#include <spinlock.h>
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/*******************************************************************************
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* Lock to control access to the console
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******************************************************************************/
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spinlock_t console_lock;
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/*******************************************************************************
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* Per cpu data structure to populate parameters for an SMC in C code and use
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* a pointer to this structure in assembler code to populate x0-x7
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******************************************************************************/
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static tsp_args tsp_smc_args[PLATFORM_CORE_COUNT];
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/*******************************************************************************
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* Per cpu data structure to keep track of TSP activity
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******************************************************************************/
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static work_statistics tsp_stats[PLATFORM_CORE_COUNT];
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/*******************************************************************************
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* Single reference to the various entry points exported by the test secure
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* payload. A single copy should suffice for all cpus as they are not expected
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* to change.
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******************************************************************************/
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static const entry_info tsp_entry_info = {
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tsp_fast_smc_entry,
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tsp_cpu_on_entry,
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tsp_cpu_off_entry,
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tsp_cpu_resume_entry,
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tsp_cpu_suspend_entry,
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};
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static tsp_args *set_smc_args(uint64_t arg0,
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uint64_t arg1,
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uint64_t arg2,
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uint64_t arg3,
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uint64_t arg4,
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uint64_t arg5,
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uint64_t arg6,
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uint64_t arg7)
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{
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uint64_t mpidr = read_mpidr();
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uint32_t linear_id;
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tsp_args *pcpu_smc_args;
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/*
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* Return to Secure Monitor by raising an SMC. The results of the
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* service are passed as an arguments to the SMC
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*/
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linear_id = platform_get_core_pos(mpidr);
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pcpu_smc_args = &tsp_smc_args[linear_id];
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write_sp_arg(pcpu_smc_args, TSP_ARG0, arg0);
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write_sp_arg(pcpu_smc_args, TSP_ARG1, arg1);
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write_sp_arg(pcpu_smc_args, TSP_ARG2, arg2);
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write_sp_arg(pcpu_smc_args, TSP_ARG3, arg3);
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write_sp_arg(pcpu_smc_args, TSP_ARG4, arg4);
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write_sp_arg(pcpu_smc_args, TSP_ARG5, arg5);
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write_sp_arg(pcpu_smc_args, TSP_ARG6, arg6);
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write_sp_arg(pcpu_smc_args, TSP_ARG7, arg7);
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return pcpu_smc_args;
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}
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/*******************************************************************************
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* TSP main entry point where it gets the opportunity to initialize its secure
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* state/applications. Once the state is initialized, it must return to the
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* SPD with a pointer to the 'tsp_entry_info' structure.
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******************************************************************************/
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uint64_t tsp_main(void)
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{
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uint64_t mpidr = read_mpidr();
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uint32_t linear_id = platform_get_core_pos(mpidr);
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#if DEBUG
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meminfo *mem_layout = bl32_plat_sec_mem_layout();
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#endif
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/* Initialize the platform */
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bl32_platform_setup();
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/* Initialize secure/applications state here */
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/* Update this cpu's statistics */
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tsp_stats[linear_id].smc_count++;
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tsp_stats[linear_id].eret_count++;
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tsp_stats[linear_id].cpu_on_count++;
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spin_lock(&console_lock);
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printf("TSP %s\n\r", build_message);
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INFO("Total memory base : 0x%x\n", mem_layout->total_base);
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INFO("Total memory size : 0x%x bytes\n", mem_layout->total_size);
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INFO("Free memory base : 0x%x\n", mem_layout->free_base);
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INFO("Free memory size : 0x%x bytes\n", mem_layout->free_size);
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INFO("cpu 0x%x: %d smcs, %d erets %d cpu on requests\n", mpidr,
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tsp_stats[linear_id].smc_count,
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tsp_stats[linear_id].eret_count,
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tsp_stats[linear_id].cpu_on_count);
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spin_unlock(&console_lock);
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/*
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* TODO: There is a massive assumption that the SPD and SP can see each
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* other's memory without issues so it is safe to pass pointers to
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* internal memory. Replace this with a shared communication buffer.
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*/
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return (uint64_t) &tsp_entry_info;
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}
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/*******************************************************************************
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* This function performs any remaining book keeping in the test secure payload
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* after this cpu's architectural state has been setup in response to an earlier
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* psci cpu_on request.
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******************************************************************************/
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tsp_args *tsp_cpu_on_main(void)
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{
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uint64_t mpidr = read_mpidr();
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uint32_t linear_id = platform_get_core_pos(mpidr);
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/* Update this cpu's statistics */
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tsp_stats[linear_id].smc_count++;
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tsp_stats[linear_id].eret_count++;
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tsp_stats[linear_id].cpu_on_count++;
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spin_lock(&console_lock);
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printf("SP: cpu 0x%x turned on\n\r", mpidr);
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INFO("cpu 0x%x: %d smcs, %d erets %d cpu on requests\n", mpidr,
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tsp_stats[linear_id].smc_count,
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tsp_stats[linear_id].eret_count,
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tsp_stats[linear_id].cpu_on_count);
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spin_unlock(&console_lock);
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/* Indicate to the SPD that we have completed turned ourselves on */
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return set_smc_args(TSP_ON_DONE, 0, 0, 0, 0, 0, 0, 0);
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}
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/*******************************************************************************
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* This function performs any remaining book keeping in the test secure payload
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* before this cpu is turned off in response to a psci cpu_off request.
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******************************************************************************/
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tsp_args *tsp_cpu_off_main(uint64_t arg0,
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uint64_t arg1,
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uint64_t arg2,
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uint64_t arg3,
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uint64_t arg4,
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uint64_t arg5,
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uint64_t arg6,
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uint64_t arg7)
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{
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uint64_t mpidr = read_mpidr();
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uint32_t linear_id = platform_get_core_pos(mpidr);
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/* Update this cpu's statistics */
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tsp_stats[linear_id].smc_count++;
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tsp_stats[linear_id].eret_count++;
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tsp_stats[linear_id].cpu_off_count++;
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spin_lock(&console_lock);
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printf("SP: cpu 0x%x off request\n\r", mpidr);
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INFO("cpu 0x%x: %d smcs, %d erets %d cpu off requests\n", mpidr,
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tsp_stats[linear_id].smc_count,
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tsp_stats[linear_id].eret_count,
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tsp_stats[linear_id].cpu_off_count);
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spin_unlock(&console_lock);
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/* Indicate to the SPD that we have completed this request */
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return set_smc_args(TSP_OFF_DONE, 0, 0, 0, 0, 0, 0, 0);
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}
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/*******************************************************************************
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* This function performs any book keeping in the test secure payload before
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* this cpu's architectural state is saved in response to an earlier psci
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* cpu_suspend request.
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******************************************************************************/
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tsp_args *tsp_cpu_suspend_main(uint64_t power_state,
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uint64_t arg1,
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uint64_t arg2,
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uint64_t arg3,
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uint64_t arg4,
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uint64_t arg5,
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uint64_t arg6,
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uint64_t arg7)
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{
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uint64_t mpidr = read_mpidr();
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uint32_t linear_id = platform_get_core_pos(mpidr);
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/* Update this cpu's statistics */
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tsp_stats[linear_id].smc_count++;
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tsp_stats[linear_id].eret_count++;
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tsp_stats[linear_id].cpu_suspend_count++;
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spin_lock(&console_lock);
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printf("SP: cpu 0x%x suspend request. power state: 0x%x\n\r",
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mpidr, power_state);
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INFO("cpu 0x%x: %d smcs, %d erets %d cpu suspend requests\n", mpidr,
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tsp_stats[linear_id].smc_count,
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tsp_stats[linear_id].eret_count,
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tsp_stats[linear_id].cpu_suspend_count);
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spin_unlock(&console_lock);
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/* Indicate to the SPD that we have completed this request */
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return set_smc_args(TSP_SUSPEND_DONE, 0, 0, 0, 0, 0, 0, 0);
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}
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/*******************************************************************************
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* This function performs any book keeping in the test secure payload after this
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* cpu's architectural state has been restored after wakeup from an earlier psci
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* cpu_suspend request.
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******************************************************************************/
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tsp_args *tsp_cpu_resume_main(uint64_t suspend_level,
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uint64_t arg1,
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uint64_t arg2,
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uint64_t arg3,
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uint64_t arg4,
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uint64_t arg5,
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uint64_t arg6,
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uint64_t arg7)
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{
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uint64_t mpidr = read_mpidr();
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uint32_t linear_id = platform_get_core_pos(mpidr);
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/* Update this cpu's statistics */
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tsp_stats[linear_id].smc_count++;
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tsp_stats[linear_id].eret_count++;
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tsp_stats[linear_id].cpu_resume_count++;
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spin_lock(&console_lock);
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printf("SP: cpu 0x%x resumed. suspend level %d \n\r",
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mpidr, suspend_level);
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INFO("cpu 0x%x: %d smcs, %d erets %d cpu suspend requests\n", mpidr,
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tsp_stats[linear_id].smc_count,
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tsp_stats[linear_id].eret_count,
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tsp_stats[linear_id].cpu_suspend_count);
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spin_unlock(&console_lock);
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/* Indicate to the SPD that we have completed this request */
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return set_smc_args(TSP_RESUME_DONE, 0, 0, 0, 0, 0, 0, 0);
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}
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/*******************************************************************************
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* TSP fast smc handler. The secure monitor jumps to this function by
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* doing the ERET after populating X0-X7 registers. The arguments are received
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* in the function arguments in order. Once the service is rendered, this
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* function returns to Secure Monitor by raising SMC
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******************************************************************************/
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tsp_args *tsp_fast_smc_handler(uint64_t func,
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uint64_t arg1,
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uint64_t arg2,
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uint64_t arg3,
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uint64_t arg4,
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uint64_t arg5,
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uint64_t arg6,
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uint64_t arg7)
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{
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uint64_t results[2];
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uint64_t service_args[2];
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uint64_t mpidr = read_mpidr();
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uint32_t linear_id = platform_get_core_pos(mpidr);
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/* Update this cpu's statistics */
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tsp_stats[linear_id].smc_count++;
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tsp_stats[linear_id].eret_count++;
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printf("SP: cpu 0x%x received fast smc 0x%x\n", read_mpidr(), func);
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INFO("cpu 0x%x: %d smcs, %d erets\n", mpidr,
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tsp_stats[linear_id].smc_count,
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tsp_stats[linear_id].eret_count);
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/* Render secure services and obtain results here */
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results[0] = arg1;
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results[1] = arg2;
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/*
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* Request a service back from dispatcher/secure monitor. This call
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* return and thereafter resume exectuion
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*/
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tsp_get_magic(service_args);
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/* Determine the function to perform based on the function ID */
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switch (func) {
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case TSP_FID_ADD:
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results[0] += service_args[0];
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results[1] += service_args[1];
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break;
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case TSP_FID_SUB:
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results[0] -= service_args[0];
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results[1] -= service_args[1];
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break;
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case TSP_FID_MUL:
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results[0] *= service_args[0];
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results[1] *= service_args[1];
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break;
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case TSP_FID_DIV:
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results[0] /= service_args[0] ? service_args[0] : 1;
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results[1] /= service_args[1] ? service_args[1] : 1;
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break;
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default:
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break;
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}
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return set_smc_args(func,
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results[0],
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results[1],
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0, 0, 0, 0, 0);
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}
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