58 lines
2.0 KiB
C
58 lines
2.0 KiB
C
/*
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* Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef __XLAT_MMU_HELPERS_H__
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#define __XLAT_MMU_HELPERS_H__
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/*
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* The following flags are passed to enable_mmu_xxx() to override the default
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* values used to program system registers while enabling the MMU.
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*/
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/*
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* When this flag is used, all data access to Normal memory from this EL and all
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* Normal memory accesses to the translation tables of this EL are non-cacheable
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* for all levels of data and unified cache until the caches are enabled by
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* setting the bit SCTLR_ELx.C.
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*/
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#define DISABLE_DCACHE (U(1) << 0)
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/*
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* Mark the translation tables as non-cacheable for the MMU table walker, which
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* is a different observer from the PE/CPU. If the flag is not specified, the
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* tables are cacheable for the MMU table walker.
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*
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* Note that, as far as the PE/CPU observer is concerned, the attributes used
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* are the ones specified in the translation tables themselves. The MAIR
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* register specifies the cacheability through the field AttrIndx of the lower
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* attributes of the translation tables. The shareability is specified in the SH
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* field of the lower attributes.
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*
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* The MMU table walker uses the attributes specified in the fields ORGNn, IRGNn
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* and SHn of the TCR register to access the translation tables.
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*
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* The attributes specified in the TCR register and the tables can be different
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* as there are no checks to prevent that. Special care must be taken to ensure
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* that there aren't mismatches. The behaviour in that case is described in the
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* sections 'Mismatched memory attributes' in the ARMv8 ARM.
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*/
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#define XLAT_TABLE_NC (U(1) << 1)
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#ifndef __ASSEMBLY__
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#ifdef AARCH32
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/* AArch32 specific translation table API */
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void enable_mmu_secure(unsigned int flags);
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#else
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/* AArch64 specific translation table APIs */
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void enable_mmu_el1(unsigned int flags);
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void enable_mmu_el3(unsigned int flags);
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#endif /* AARCH32 */
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#endif /* __ASSEMBLY__ */
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#endif /* __XLAT_MMU_HELPERS_H__ */
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