57 lines
1.7 KiB
C
57 lines
1.7 KiB
C
/*
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* Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <bl_common.h>
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#include <desc_image_load.h>
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#include <plat_arm.h>
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#if JUNO_AARCH32_EL3_RUNTIME
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/*******************************************************************************
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* This function changes the spsr for BL32 image to bypass
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* the check in BL1 AArch64 exception handler. This is needed in the aarch32
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* boot flow as the core comes up in aarch64 and to enter the BL32 image a warm
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* reset in aarch32 state is required.
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******************************************************************************/
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int bl2_plat_handle_post_image_load(unsigned int image_id)
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{
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int err = arm_bl2_handle_post_image_load(image_id);
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if (!err && (image_id == BL32_IMAGE_ID)) {
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bl_mem_params_node_t *bl_mem_params = get_bl_mem_params_node(image_id);
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assert(bl_mem_params);
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bl_mem_params->ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
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DISABLE_ALL_EXCEPTIONS);
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}
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return err;
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}
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/*
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* We need to override some of the platform functions when booting SP_MIN
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* on Juno AArch32.
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*/
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static unsigned int scp_boot_config;
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void bl2_early_platform_setup(meminfo_t *mem_layout)
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{
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arm_bl2_early_platform_setup(mem_layout);
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/* Save SCP Boot config before it gets overwritten by SCP_BL2 loading */
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VERBOSE("BL2: Saving SCP Boot config = 0x%x\n", scp_boot_config);
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scp_boot_config = mmio_read_32(SCP_BOOT_CFG_ADDR);
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}
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void bl2_platform_setup(void)
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{
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arm_bl2_platform_setup();
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mmio_write_32(SCP_BOOT_CFG_ADDR, scp_boot_config);
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VERBOSE("BL2: Restored SCP Boot config = 0x%x\n", scp_boot_config);
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}
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#endif /* JUNO_AARCH32_EL3_RUNTIME */
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