Bipin Ravi 7cfae93227 errata: workaround for Neoverse N2 erratum 2189731 ... Neoverse N2 erratum 2189731 is a Cat B erratum that applies to revision r0p0 and is still open. The workaround is to set CPUACTLR5_EL1[44] to 1 which will cause the CPP instruction to invalidate the hardware prefetcher state trained from any EL. SDEN can be found here: https://developer.arm.com/documentation/SDEN1982442/latest Signed-off-by: Bipin Ravi <bipin.ravi@arm.com> Change-Id: Iddc6a59adf9fa3cab560c46f2133e1f5a8b3ad03		2021-09-03 15:44:56 -05:00
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aarch32	Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__	2019-08-01 13:14:12 -07:00
aarch64	errata: workaround for Neoverse N2 erratum 2189731	2021-09-03 15:44:56 -05:00
errata_report.h	Workaround for Cortex A78 erratum 1951500	2021-01-13 13:54:18 -06:00
wa_cve_2017_5715.h	Fix MISRA defects in workaround and errata framework	2018-10-29 14:41:48 +00:00
wa_cve_2018_3639.h	Fix MISRA defects in workaround and errata framework	2018-10-29 14:41:48 +00:00