272 lines
8.4 KiB
C
272 lines
8.4 KiB
C
/*
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* Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <arch.h>
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#include <arch_helpers.h>
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#include <assert.h>
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#include <auth_mod.h>
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#include <bl1.h>
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#include <bl_common.h>
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#include <debug.h>
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#include <platform.h>
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#include <platform_def.h>
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#include <smcc_helpers.h>
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#include "bl1_private.h"
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#include <uuid.h>
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/* BL1 Service UUID */
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DEFINE_SVC_UUID(bl1_svc_uid,
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0xfd3967d4, 0x72cb, 0x4d9a, 0xb5, 0x75,
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0x67, 0x15, 0xd6, 0xf4, 0xbb, 0x4a);
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static void bl1_load_bl2(void);
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/*******************************************************************************
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* The next function has a weak definition. Platform specific code can override
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* it if it wishes to.
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******************************************************************************/
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#pragma weak bl1_init_bl2_mem_layout
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/*******************************************************************************
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* Function that takes a memory layout into which BL2 has been loaded and
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* populates a new memory layout for BL2 that ensures that BL1's data sections
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* resident in secure RAM are not visible to BL2.
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******************************************************************************/
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void bl1_init_bl2_mem_layout(const meminfo_t *bl1_mem_layout,
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meminfo_t *bl2_mem_layout)
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{
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const size_t bl1_size = BL1_RAM_LIMIT - BL1_RAM_BASE;
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assert(bl1_mem_layout != NULL);
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assert(bl2_mem_layout != NULL);
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/* Check that BL1's memory is lying outside of the free memory */
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assert((BL1_RAM_LIMIT <= bl1_mem_layout->free_base) ||
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(BL1_RAM_BASE >= bl1_mem_layout->free_base +
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bl1_mem_layout->free_size));
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/* Remove BL1 RW data from the scope of memory visible to BL2 */
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*bl2_mem_layout = *bl1_mem_layout;
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reserve_mem(&bl2_mem_layout->total_base,
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&bl2_mem_layout->total_size,
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BL1_RAM_BASE,
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bl1_size);
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flush_dcache_range((unsigned long)bl2_mem_layout, sizeof(meminfo_t));
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}
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/*******************************************************************************
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* Function to perform late architectural and platform specific initialization.
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* It also queries the platform to load and run next BL image. Only called
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* by the primary cpu after a cold boot.
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******************************************************************************/
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void bl1_main(void)
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{
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unsigned int image_id;
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/* Announce our arrival */
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NOTICE(FIRMWARE_WELCOME_STR);
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NOTICE("BL1: %s\n", version_string);
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NOTICE("BL1: %s\n", build_message);
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INFO("BL1: RAM 0x%lx - 0x%lx\n", BL1_RAM_BASE, BL1_RAM_LIMIT);
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#if DEBUG
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unsigned long val;
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/*
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* Ensure that MMU/Caches and coherency are turned on
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*/
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val = read_sctlr_el3();
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assert(val & SCTLR_M_BIT);
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assert(val & SCTLR_C_BIT);
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assert(val & SCTLR_I_BIT);
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/*
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* Check that Cache Writeback Granule (CWG) in CTR_EL0 matches the
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* provided platform value
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*/
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val = (read_ctr_el0() >> CTR_CWG_SHIFT) & CTR_CWG_MASK;
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/*
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* If CWG is zero, then no CWG information is available but we can
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* at least check the platform value is less than the architectural
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* maximum.
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*/
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if (val != 0)
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assert(CACHE_WRITEBACK_GRANULE == SIZE_FROM_LOG2_WORDS(val));
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else
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assert(CACHE_WRITEBACK_GRANULE <= MAX_CACHE_LINE_SIZE);
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#endif
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/* Perform remaining generic architectural setup from EL3 */
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bl1_arch_setup();
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#if TRUSTED_BOARD_BOOT
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/* Initialize authentication module */
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auth_mod_init();
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#endif /* TRUSTED_BOARD_BOOT */
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/* Perform platform setup in BL1. */
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bl1_platform_setup();
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/* Get the image id of next image to load and run. */
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image_id = bl1_plat_get_next_image_id();
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/*
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* We currently interpret any image id other than
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* BL2_IMAGE_ID as the start of firmware update.
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*/
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if (image_id == BL2_IMAGE_ID)
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bl1_load_bl2();
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else
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NOTICE("BL1-FWU: *******FWU Process Started*******\n");
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bl1_prepare_next_image(image_id);
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}
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/*******************************************************************************
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* This function locates and loads the BL2 raw binary image in the trusted SRAM.
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* Called by the primary cpu after a cold boot.
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* TODO: Add support for alternative image load mechanism e.g using virtio/elf
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* loader etc.
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******************************************************************************/
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void bl1_load_bl2(void)
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{
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image_desc_t *image_desc;
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image_info_t *image_info;
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entry_point_info_t *ep_info;
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meminfo_t *bl1_tzram_layout;
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meminfo_t *bl2_tzram_layout;
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int err;
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/* Get the image descriptor */
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image_desc = bl1_plat_get_image_desc(BL2_IMAGE_ID);
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assert(image_desc);
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/* Get the image info */
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image_info = &image_desc->image_info;
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/* Get the entry point info */
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ep_info = &image_desc->ep_info;
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/* Find out how much free trusted ram remains after BL1 load */
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bl1_tzram_layout = bl1_plat_sec_mem_layout();
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INFO("BL1: Loading BL2\n");
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/* Load the BL2 image */
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err = load_auth_image(bl1_tzram_layout,
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BL2_IMAGE_ID,
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image_info->image_base,
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image_info,
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ep_info);
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if (err) {
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ERROR("Failed to load BL2 firmware.\n");
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plat_error_handler(err);
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}
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/*
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* Create a new layout of memory for BL2 as seen by BL1 i.e.
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* tell it the amount of total and free memory available.
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* This layout is created at the first free address visible
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* to BL2. BL2 will read the memory layout before using its
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* memory for other purposes.
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*/
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bl2_tzram_layout = (meminfo_t *) bl1_tzram_layout->free_base;
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bl1_init_bl2_mem_layout(bl1_tzram_layout, bl2_tzram_layout);
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ep_info->args.arg1 = (unsigned long)bl2_tzram_layout;
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NOTICE("BL1: Booting BL2\n");
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VERBOSE("BL1: BL2 memory layout address = 0x%llx\n",
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(unsigned long long) bl2_tzram_layout);
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}
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/*******************************************************************************
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* Function called just before handing over to BL31 to inform the user about
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* the boot progress. In debug mode, also print details about the BL31 image's
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* execution context.
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******************************************************************************/
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void bl1_print_bl31_ep_info(const entry_point_info_t *bl31_ep_info)
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{
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NOTICE("BL1: Booting BL31\n");
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print_entry_point_info(bl31_ep_info);
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}
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#if SPIN_ON_BL1_EXIT
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void print_debug_loop_message(void)
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{
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NOTICE("BL1: Debug loop, spinning forever\n");
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NOTICE("BL1: Please connect the debugger to continue\n");
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}
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#endif
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/*******************************************************************************
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* Top level handler for servicing BL1 SMCs.
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******************************************************************************/
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register_t bl1_smc_handler(unsigned int smc_fid,
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register_t x1,
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register_t x2,
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register_t x3,
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register_t x4,
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void *cookie,
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void *handle,
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unsigned int flags)
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{
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#if TRUSTED_BOARD_BOOT
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/*
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* Dispatch FWU calls to FWU SMC handler and return its return
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* value
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*/
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if (is_fwu_fid(smc_fid)) {
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return bl1_fwu_smc_handler(smc_fid, x1, x2, x3, x4, cookie,
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handle, flags);
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}
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#endif
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switch (smc_fid) {
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case BL1_SMC_CALL_COUNT:
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SMC_RET1(handle, BL1_NUM_SMC_CALLS);
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case BL1_SMC_UID:
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SMC_UUID_RET(handle, bl1_svc_uid);
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case BL1_SMC_VERSION:
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SMC_RET1(handle, BL1_SMC_MAJOR_VER | BL1_SMC_MINOR_VER);
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default:
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break;
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}
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WARN("Unimplemented BL1 SMC Call: 0x%x \n", smc_fid);
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SMC_RET1(handle, SMC_UNK);
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}
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