111 lines
4.1 KiB
C
111 lines
4.1 KiB
C
/*
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* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <arm_def.h>
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#include <bl_common.h>
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#include <console.h>
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#include <platform_def.h>
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#include <platform_tsp.h>
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#include <plat_arm.h>
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/*
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* The next 3 constants identify the extents of the code & RO data region and
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* the limit of the BL32 image. These addresses are used by the MMU setup code
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* and therefore they must be page-aligned. It is the responsibility of the
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* linker script to ensure that __RO_START__, __RO_END__ & & __BL32_END__
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* linker symbols refer to page-aligned addresses.
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*/
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#define BL32_RO_BASE (unsigned long)(&__RO_START__)
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#define BL32_RO_LIMIT (unsigned long)(&__RO_END__)
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#define BL32_END (unsigned long)(&__BL32_END__)
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#if USE_COHERENT_MEM
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/*
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* The next 2 constants identify the extents of the coherent memory region.
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* These addresses are used by the MMU setup code and therefore they must be
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* page-aligned. It is the responsibility of the linker script to ensure that
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* __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
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* page-aligned addresses.
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*/
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#define BL32_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
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#define BL32_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
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#endif
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/* Weak definitions may be overridden in specific ARM standard platform */
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#pragma weak tsp_early_platform_setup
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#pragma weak tsp_platform_setup
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#pragma weak tsp_plat_arch_setup
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/*******************************************************************************
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* Initialize the UART
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******************************************************************************/
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void arm_tsp_early_platform_setup(void)
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{
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/*
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* Initialize a different console than already in use to display
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* messages from TSP
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*/
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console_init(PLAT_ARM_TSP_UART_BASE, PLAT_ARM_TSP_UART_CLK_IN_HZ,
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ARM_CONSOLE_BAUDRATE);
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}
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void tsp_early_platform_setup(void)
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{
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arm_tsp_early_platform_setup();
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}
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/*******************************************************************************
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* Perform platform specific setup placeholder
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******************************************************************************/
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void tsp_platform_setup(void)
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{
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plat_arm_gic_driver_init();
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}
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/*******************************************************************************
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* Perform the very early platform specific architectural setup here. At the
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* moment this is only intializes the MMU
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******************************************************************************/
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void tsp_plat_arch_setup(void)
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{
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arm_configure_mmu_el1(BL32_RO_BASE,
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(BL32_END - BL32_RO_BASE),
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BL32_RO_BASE,
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BL32_RO_LIMIT
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#if USE_COHERENT_MEM
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, BL32_COHERENT_RAM_BASE,
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BL32_COHERENT_RAM_LIMIT
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#endif
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);
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}
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