36e2fd0139
Calls to system register read accessors functions may be optimised out by the compiler if called twice in a row for the same register. This is because the compiler is not aware that the result from the instruction may be modified by external agents. Therefore, if nothing modifies the register between the 2 reads as far as the compiler knows then it might consider that it is useless to read it twice and emit only 1 call. This behaviour is faulty for registers that may not have the same value if read twice in succession. E.g.: counters, timer control/countdown registers, GICv3 interrupt status registers and so on. The same problem happens for calls to system register write accessors functions. The compiler might optimise out some calls if it considers that it will produce the same result. Again, this behaviour is faulty for cases where intermediate writes to these registers make a difference in the system. This patch fixes the problem by making these assembly register accesses volatile. Fixes ARM-software/tf-issues#273 Change-Id: I33903bc4cc4eea8a8d87bc2c757909fbb0138925 |
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| .. | ||
| aarch64 | ||
| cpus/aarch64 | ||
| bakery_lock.h | ||
| cassert.h | ||
| mmio.h | ||
| semihosting.h | ||
| spinlock.h | ||