Dimitris Papastamos d6b798097e Implement dynamic mitigation for CVE-2018-3639 on Cortex-A76 ... The Cortex-A76 implements SMCCC_ARCH_WORKAROUND_2 as defined in "Firmware interfaces for mitigating cache speculation vulnerabilities System Software on Arm Systems"[0]. Dynamic mitigation for CVE-2018-3639 is enabled/disabled by setting/clearning bit 16 (Disable load pass store) of `CPUACTLR2_EL1`. NOTE: The generic code that implements dynamic mitigation does not currently implement the expected semantics when dispatching an SDEI event to a lower EL. This will be fixed in a separate patch. [0] https://developer.arm.com/cache-speculation-vulnerability-firmware-specification Change-Id: I8fb2862b9ab24d55a0e9693e48e8be4df32afb5a Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>		2018-06-08 11:46:31 +01:00
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aarch32	aarch32: Implement static workaround for CVE-2018-3639	2018-05-23 12:45:48 +01:00
aarch64	Implement dynamic mitigation for CVE-2018-3639 on Cortex-A76	2018-06-08 11:46:31 +01:00
errata_report.h	Fix MISRA rule 8.4 in common code	2018-02-28 17:18:46 +00:00
wa_cve_2017_5715.h	Rename symbols and files relating to CVE-2017-5715	2018-05-23 12:45:48 +01:00
wa_cve_2018_3639.h	Add support for dynamic mitigation for CVE-2018-3639	2018-05-23 12:45:48 +01:00