62 lines
1.8 KiB
C
62 lines
1.8 KiB
C
/*
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* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef __FLOWCTRL_H__
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#define __FLOWCTRL_H__
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#include <mmio.h>
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#include <tegra_def.h>
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#define FLOWCTRL_HALT_CPU0_EVENTS 0x0U
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#define FLOWCTRL_WAITEVENT (2U << 29)
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#define FLOWCTRL_WAIT_FOR_INTERRUPT (4U << 29)
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#define FLOWCTRL_JTAG_RESUME (1U << 28)
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#define FLOWCTRL_HALT_SCLK (1U << 27)
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#define FLOWCTRL_HALT_LIC_IRQ (1U << 11)
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#define FLOWCTRL_HALT_LIC_FIQ (1U << 10)
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#define FLOWCTRL_HALT_GIC_IRQ (1U << 9)
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#define FLOWCTRL_HALT_GIC_FIQ (1U << 8)
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#define FLOWCTRL_HALT_BPMP_EVENTS 0x4U
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#define FLOWCTRL_CPU0_CSR 0x8U
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#define FLOW_CTRL_CSR_PWR_OFF_STS (1U << 16)
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#define FLOWCTRL_CSR_INTR_FLAG (1U << 15)
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#define FLOWCTRL_CSR_EVENT_FLAG (1U << 14)
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#define FLOWCTRL_CSR_IMMEDIATE_WAKE (1U << 3)
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#define FLOWCTRL_CSR_ENABLE (1U << 0)
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#define FLOWCTRL_HALT_CPU1_EVENTS 0x14U
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#define FLOWCTRL_CPU1_CSR 0x18U
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#define FLOWCTRL_CC4_CORE0_CTRL 0x6cU
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#define FLOWCTRL_WAIT_WFI_BITMAP 0x100U
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#define FLOWCTRL_L2_FLUSH_CONTROL 0x94U
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#define FLOWCTRL_BPMP_CLUSTER_CONTROL 0x98U
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#define FLOWCTRL_BPMP_CLUSTER_PWRON_LOCK (1U << 2)
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#define FLOWCTRL_ENABLE_EXT 12U
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#define FLOWCTRL_ENABLE_EXT_MASK 3U
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#define FLOWCTRL_PG_CPU_NONCPU 0x1U
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#define FLOWCTRL_TURNOFF_CPURAIL 0x2U
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static inline uint32_t tegra_fc_read_32(uint32_t off)
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{
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return mmio_read_32(TEGRA_FLOWCTRL_BASE + off);
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}
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static inline void tegra_fc_write_32(uint32_t off, uint32_t val)
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{
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mmio_write_32(TEGRA_FLOWCTRL_BASE + off, val);
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}
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void tegra_fc_cluster_idle(uint32_t midr);
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void tegra_fc_cpu_powerdn(uint32_t mpidr);
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void tegra_fc_cluster_powerdn(uint32_t midr);
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void tegra_fc_soc_powerdn(uint32_t midr);
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void tegra_fc_cpu_on(int cpu);
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void tegra_fc_cpu_off(int cpu);
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void tegra_fc_lock_active_cluster(void);
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void tegra_fc_reset_bpmp(void);
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#endif /* __FLOWCTRL_H__ */
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