Varun Wadekar 7d74487c2a Tegra186: store TZDRAM base/size to scratch registers ... This patch saves the TZDRAM base and size values to secure scratch registers, for the WB0. The WB0 reads these values and uses them to verify integrity of the TZDRAM aperture. Change-Id: Ic70914cb958249f06cb58025a24d13734a85e16e Signed-off-by: Jeetesh Burman <jburman@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>		2020-03-09 15:25:16 -07:00
..
common	Tegra: fiq_glue: remove bakery locks from interrupt handler	2020-03-09 15:25:15 -07:00
include	Tegra186: add SE support to generate SHA256 of TZRAM	2020-03-09 15:25:16 -07:00
scat	spm: Remove SPM Alpha 1 prototype and support files	2019-12-20 16:03:32 +00:00
soc	Tegra186: store TZDRAM base/size to scratch registers	2020-03-09 15:25:16 -07:00
platform.mk	Tegra: platform handler to relocate BL32 image	2020-02-20 09:25:45 -08:00