99 lines
2.4 KiB
C
99 lines
2.4 KiB
C
/*
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* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arch_helpers.h>
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#include <assert.h>
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#include <bl_common.h>
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#include <console.h>
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#include <debug.h>
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#include <dw_mmc.h>
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#include <emmc.h>
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#include <errno.h>
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#include <generic_delay_timer.h>
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#include <mmio.h>
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#include <pl061_gpio.h>
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#include <platform.h>
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#include <platform_def.h>
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#include <string.h>
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#include <tbbr_img_def.h>
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#include "../../bl1/bl1_private.h"
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#include "hi3798cv200.h"
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#include "plat_private.h"
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/* Symbols from link script for conherent section */
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extern unsigned long __COHERENT_RAM_START__;
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extern unsigned long __COHERENT_RAM_END__;
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#define BL1_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
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#define BL1_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
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/* Data structure which holds the extents of the trusted RAM for BL1 */
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static meminfo_t bl1_tzram_layout;
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meminfo_t *bl1_plat_sec_mem_layout(void)
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{
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return &bl1_tzram_layout;
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}
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void bl1_early_platform_setup(void)
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{
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/* Initialize the console to provide early debug support */
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console_init(PL011_UART0_BASE, PL011_UART0_CLK_IN_HZ, PL011_BAUDRATE);
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/* Allow BL1 to see the whole Trusted RAM */
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bl1_tzram_layout.total_base = BL_MEM_BASE;
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bl1_tzram_layout.total_size = BL_MEM_SIZE;
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/* Calculate how much RAM BL1 is using and how much remains free */
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bl1_tzram_layout.free_base = BL_MEM_BASE;
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bl1_tzram_layout.free_size = BL_MEM_SIZE;
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reserve_mem(&bl1_tzram_layout.free_base,
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&bl1_tzram_layout.free_size,
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BL1_RAM_BASE,
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BL1_RAM_LIMIT - BL1_RAM_BASE);
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INFO("BL1: 0x%lx - 0x%lx [size = %zu]\n", BL1_RAM_BASE, BL1_RAM_LIMIT,
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BL1_RAM_LIMIT - BL1_RAM_BASE);
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}
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void bl1_plat_arch_setup(void)
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{
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plat_configure_mmu_el3(bl1_tzram_layout.total_base,
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bl1_tzram_layout.total_size,
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BL_MEM_BASE, /* l-loader and BL1 ROM */
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BL1_RO_LIMIT,
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BL1_COHERENT_RAM_BASE,
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BL1_COHERENT_RAM_LIMIT);
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}
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void bl1_platform_setup(void)
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{
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int i;
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#if !POPLAR_RECOVERY
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dw_mmc_params_t params = EMMC_INIT_PARAMS(POPLAR_EMMC_DESC_BASE);
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#endif
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generic_delay_timer_init();
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pl061_gpio_init();
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for (i = 0; i < GPIO_MAX; i++)
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pl061_gpio_register(GPIO_BASE(i), i);
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#if !POPLAR_RECOVERY
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/* SoC-specific emmc register are initialized/configured by bootrom */
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INFO("BL1: initializing emmc\n");
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dw_mmc_init(¶ms);
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#endif
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plat_io_setup();
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}
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unsigned int bl1_plat_get_next_image_id(void)
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{
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return BL2_IMAGE_ID;
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}
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