Louis Mayencourt e6cab15dc7 Add workaround for errata 855423 of Cortex-A73 ... Broadcast maintainance operations might not be correctly synchronized between cores. Set bit 7 of S3_0_C15_C0_2 to prevent this. Change-Id: I67fb62c0b458d44320ebaedafcb8495ff26c814b Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>		2019-02-26 13:22:56 +00:00
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aarch32	cpus: Add casts to all definitions in CPU headers	2019-02-11 13:34:57 +00:00
aarch64	Add workaround for errata 855423 of Cortex-A73	2019-02-26 13:22:56 +00:00
errata_report.h	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
wa_cve_2017_5715.h	Fix MISRA defects in workaround and errata framework	2018-10-29 14:41:48 +00:00
wa_cve_2018_3639.h	Fix MISRA defects in workaround and errata framework	2018-10-29 14:41:48 +00:00