175 lines
5.8 KiB
C
175 lines
5.8 KiB
C
/*
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* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __RUNTIME_SVC_H__
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#define __RUNTIME_SVC_H__
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#include <psci.h>
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#include <bl_common.h>
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/*******************************************************************************
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* Bit definitions inside the function id as per the SMC calling convention
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******************************************************************************/
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#define FUNCID_TYPE_SHIFT 31
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#define FUNCID_CC_SHIFT 30
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#define FUNCID_OWNER_SHIFT 24
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#define FUNCID_NUM_SHIFT 0
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#define FUNCID_TYPE_MASK 0x1
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#define FUNCID_CC_MASK 0x1
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#define FUNCID_OWNER_MASK 0x3f
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#define FUNCID_NUM_MASK 0xffff
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#define GET_SMC_CC(id) ((id >> FUNCID_CC_SHIFT) & \
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FUNCID_CC_MASK)
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#define SMC_64 1
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#define SMC_32 0
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#define SMC_UNK 0xffffffff
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/*******************************************************************************
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* Constants to indicate type of exception to the common exception handler.
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******************************************************************************/
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#define SYNC_EXCEPTION_SP_EL0 0x0
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#define IRQ_SP_EL0 0x1
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#define FIQ_SP_EL0 0x2
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#define SERROR_SP_EL0 0x3
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#define SYNC_EXCEPTION_SP_ELX 0x4
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#define IRQ_SP_ELX 0x5
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#define FIQ_SP_ELX 0x6
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#define SERROR_SP_ELX 0x7
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#define SYNC_EXCEPTION_AARCH64 0x8
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#define IRQ_AARCH64 0x9
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#define FIQ_AARCH64 0xa
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#define SERROR_AARCH64 0xb
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#define SYNC_EXCEPTION_AARCH32 0xc
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#define IRQ_AARCH32 0xd
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#define FIQ_AARCH32 0xe
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#define SERROR_AARCH32 0xf
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/*******************************************************************************
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* Constants that allow assembler code to access members of the 'gp_regs'
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* structure at their correct offsets.
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******************************************************************************/
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#define SIZEOF_GPREGS 0x110
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#define GPREGS_X0_OFF 0x0
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#define GPREGS_X1_OFF 0x8
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#define GPREGS_X2_OFF 0x10
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#define GPREGS_X3_OFF 0x18
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#define GPREGS_X4_OFF 0x20
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#define GPREGS_X5_OFF 0x28
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#define GPREGS_X6_OFF 0x30
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#define GPREGS_X7_OFF 0x38
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#define GPREGS_X8_OFF 0x40
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#define GPREGS_X9_OFF 0x48
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#define GPREGS_X10_OFF 0x50
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#define GPREGS_X11_OFF 0x58
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#define GPREGS_X12_OFF 0x60
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#define GPREGS_X13_OFF 0x68
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#define GPREGS_X14_OFF 0x70
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#define GPREGS_X15_OFF 0x78
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#define GPREGS_X16_OFF 0x80
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#define GPREGS_X17_OFF 0x88
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#define GPREGS_X18_OFF 0x90
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#define GPREGS_X19_OFF 0x98
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#define GPREGS_X20_OFF 0xA0
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#define GPREGS_X21_OFF 0xA8
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#define GPREGS_X22_OFF 0xB0
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#define GPREGS_X23_OFF 0xB8
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#define GPREGS_X24_OFF 0xC0
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#define GPREGS_X25_OFF 0xC8
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#define GPREGS_X26_OFF 0xD0
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#define GPREGS_X27_OFF 0xD8
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#define GPREGS_X28_OFF 0xE0
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#define GPREGS_SP_EL0_OFF 0xE8
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#define GPREGS_SPSR_OFF 0xF0
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#define GPREGS_FP_OFF 0x100
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#define GPREGS_LR_OFF 0x108
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#ifndef __ASSEMBLY__
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typedef struct {
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uint64_t x0;
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uint64_t x1;
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uint64_t x2;
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uint64_t x3;
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uint64_t x4;
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uint64_t x5;
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uint64_t x6;
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uint64_t x7;
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uint64_t x8;
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uint64_t x9;
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uint64_t x10;
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uint64_t x11;
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uint64_t x12;
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uint64_t x13;
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uint64_t x14;
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uint64_t x15;
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uint64_t x16;
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uint64_t x17;
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uint64_t x18;
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uint64_t x19;
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uint64_t x20;
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uint64_t x21;
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uint64_t x22;
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uint64_t x23;
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uint64_t x24;
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uint64_t x25;
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uint64_t x26;
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uint64_t x27;
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uint64_t x28;
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uint64_t sp_el0;
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uint32_t spsr;
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/*
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* Alignment constraint which allows save & restore of fp & lr on the
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* stack during exception handling
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*/
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uint64_t fp __attribute__((__aligned__(16)));
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uint64_t lr;
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} __attribute__((__aligned__(16))) gp_regs;
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/*******************************************************************************
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* Compile time assertions to ensure that:
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* 1) the assembler code's view of the size of the 'gp_regs' data structure is
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* the same as the actual size of this data structure.
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* 2) the assembler code's view of the offset of the frame pointer member of
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* the 'gp_regs' structure is the same as the actual offset of this member.
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******************************************************************************/
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CASSERT((sizeof(gp_regs) == SIZEOF_GPREGS), assert_sizeof_gpregs_mismatch);
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CASSERT(GPREGS_FP_OFF == __builtin_offsetof(gp_regs, fp), \
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assert_gpregs_fp_offset_mismatch);
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/*******************************************************************************
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* Function & variable prototypes
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******************************************************************************/
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extern void runtime_svc_init(unsigned long mpidr);
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#endif /*__ASSEMBLY__*/
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#endif /* __RUNTIME_SVC_H__ */
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