152 lines
5.1 KiB
ArmAsm
152 lines
5.1 KiB
ArmAsm
/*
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* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <arch.h>
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#include <platform.h>
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.globl pcpu_dv_mem_stack
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.weak platform_get_core_pos
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.weak platform_set_stack
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.weak platform_get_stack
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.weak platform_is_primary_cpu
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.weak platform_set_coherent_stack
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.weak platform_check_mpidr
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.weak plat_report_exception
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/* -----------------------------------------------------
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* 512 bytes of coherent stack for each cpu
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* -----------------------------------------------------
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*/
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#define PCPU_DV_MEM_STACK_SIZE 0x200
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.section .text, "ax"; .align 3
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/* -----------------------------------------------------
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* unsigned long long platform_set_coherent_stack
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* (unsigned mpidr);
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* For a given mpidr, this function returns the stack
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* pointer allocated in device memory. This stack can
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* be used by C code which enables/disables the SCTLR.M
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* SCTLR.C bit e.g. while powering down a cpu
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* -----------------------------------------------------
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*/
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platform_set_coherent_stack:; .type platform_set_coherent_stack, %function
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mov x5, x30 // lr
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bl platform_get_core_pos
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add x0, x0, #1
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mov x1, #PCPU_DV_MEM_STACK_SIZE
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mul x0, x0, x1
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ldr x1, =pcpu_dv_mem_stack
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add sp, x1, x0
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ret x5
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/* -----------------------------------------------------
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* int platform_get_core_pos(int mpidr);
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* With this function: CorePos = (ClusterId * 4) +
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* CoreId
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* -----------------------------------------------------
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*/
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platform_get_core_pos:; .type platform_get_core_pos, %function
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and x1, x0, #MPIDR_CPU_MASK
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and x0, x0, #MPIDR_CLUSTER_MASK
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add x0, x1, x0, LSR #6
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ret
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/* -----------------------------------------------------
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* void platform_is_primary_cpu (unsigned int mpid);
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*
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* Given the mpidr say whether this cpu is the primary
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* cpu (applicable ony after a cold boot)
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* -----------------------------------------------------
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*/
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platform_is_primary_cpu:; .type platform_is_primary_cpu, %function
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and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
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cmp x0, #PRIMARY_CPU
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cset x0, eq
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ret
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/* -----------------------------------------------------
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* void platform_get_stack (unsigned long mpidr)
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* -----------------------------------------------------
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*/
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platform_get_stack:; .type platform_get_stack, %function
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mov x10, x30 // lr
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bl platform_get_core_pos
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add x0, x0, #1
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mov x1, #PLATFORM_STACK_SIZE
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mul x0, x0, x1
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ldr x1, =platform_normal_stacks
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add x0, x1, x0
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ret x10
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/* -----------------------------------------------------
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* void platform_set_stack (unsigned long mpidr)
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* -----------------------------------------------------
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*/
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platform_set_stack:; .type platform_set_stack, %function
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mov x9, x30 // lr
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bl platform_get_stack
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mov sp, x0
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ret x9
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/* -----------------------------------------------------
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* Placeholder function which should be redefined by
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* each platform.
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* -----------------------------------------------------
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*/
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platform_check_mpidr:; .type platform_check_mpidr, %function
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mov x0, xzr
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ret
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/* -----------------------------------------------------
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* Placeholder function which should be redefined by
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* each platform.
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* -----------------------------------------------------
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*/
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plat_report_exception:
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ret
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/* -----------------------------------------------------
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* Per-cpu stacks in device memory.
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* Used for C code just before power down or right after
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* power up when the MMU or caches need to be turned on
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* or off. Each cpu gets a stack of 512 bytes.
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* -----------------------------------------------------
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*/
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.section tzfw_coherent_mem, "aw", %nobits; .align 6
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pcpu_dv_mem_stack:
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/* Zero fill */
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.space (PLATFORM_CORE_COUNT * PCPU_DV_MEM_STACK_SIZE), 0
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