85 lines
2.2 KiB
C
85 lines
2.2 KiB
C
/*
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* Copyright (c) 2019, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef FVP_VE_DEF_H
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#define FVP_VE_DEF_H
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#include <lib/utils_def.h>
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/* Default cluster count for FVP VE */
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#define FVP_VE_CLUSTER_COUNT 1
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/* Default number of CPUs per cluster on FVP VE */
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#define FVP_VE_MAX_CPUS_PER_CLUSTER 1
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/* Default number of threads per CPU on FVP VE */
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#define FVP_VE_MAX_PE_PER_CPU 1
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#define FVP_VE_CORE_COUNT 1
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#define FVP_VE_PRIMARY_CPU 0x0
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/*******************************************************************************
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* FVP memory map related constants
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******************************************************************************/
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#define FLASH1_BASE 0x0c000000
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#define FLASH1_SIZE 0x04000000
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/* Aggregate of all devices in the first GB */
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#define DEVICE0_BASE 0x20000000
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#define DEVICE0_SIZE 0x0c200000
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#define NSRAM_BASE 0x2e000000
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#define NSRAM_SIZE 0x10000
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#define PCIE_EXP_BASE 0x40000000
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#define TZRNG_BASE 0x7fe60000
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#define ARCH_MODEL_VE 0x5
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/* FVP Power controller base address*/
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#define PWRC_BASE UL(0x1c100000)
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/* FVP SP804 timer frequency is 35 MHz*/
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#define SP804_TIMER_CLKMULT 1
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#define SP804_TIMER_CLKDIV 35
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/* SP810 controller. FVP specific flags */
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#define FVP_SP810_CTRL_TIM0_OV (1 << 16)
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#define FVP_SP810_CTRL_TIM1_OV (1 << 18)
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#define FVP_SP810_CTRL_TIM2_OV (1 << 20)
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#define FVP_SP810_CTRL_TIM3_OV (1 << 22)
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/*******************************************************************************
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* GIC-400 & interrupt handling related constants
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******************************************************************************/
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/* VE compatible GIC memory map */
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#define VE_GICD_BASE 0x2c001000
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#ifdef ARM_CORTEX_A5
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#define VE_GICC_BASE 0x2c000100
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#else
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#define VE_GICC_BASE 0x2c002000
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#endif
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#define VE_GICH_BASE 0x2c004000
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#define VE_GICV_BASE 0x2c006000
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#define FVP_VE_IRQ_TZ_WDOG 56
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#define FVP_VE_IRQ_SEC_SYS_TIMER 57
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#define V2M_FLASH1_BASE UL(0x0C000000)
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#define V2M_FLASH1_SIZE UL(0x04000000)
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#define V2M_MAP_FLASH1_RW MAP_REGION_FLAT(V2M_FLASH1_BASE,\
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V2M_FLASH1_SIZE, \
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MT_DEVICE | MT_RW | MT_SECURE)
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#define V2M_MAP_FLASH1_RO MAP_REGION_FLAT(V2M_FLASH1_BASE,\
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V2M_FLASH1_SIZE, \
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MT_RO_DATA | MT_SECURE)
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#endif /* FVP_VE_DEF_H */
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