67 lines
1.6 KiB
C
67 lines
1.6 KiB
C
/*
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* Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <common/tbbr/tbbr_img_def.h>
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#include <drivers/arm/smmu_v3.h>
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#include <drivers/arm/sp805.h>
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#include <plat/arm/common/arm_config.h>
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#include <plat/arm/common/plat_arm.h>
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#include <plat/arm/common/arm_def.h>
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#include <plat/common/platform.h>
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#include "fvp_private.h"
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/*******************************************************************************
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* Perform any BL1 specific platform actions.
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******************************************************************************/
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void bl1_early_platform_setup(void)
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{
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arm_bl1_early_platform_setup();
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/* Initialize the platform config for future decision making */
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fvp_config_setup();
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/*
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* Initialize Interconnect for this cluster during cold boot.
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* No need for locks as no other CPU is active.
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*/
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fvp_interconnect_init();
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/*
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* Enable coherency in Interconnect for the primary CPU's cluster.
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*/
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fvp_interconnect_enable();
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}
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void plat_arm_secure_wdt_start(void)
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{
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sp805_start(ARM_SP805_TWDG_BASE, ARM_TWDG_LOAD_VAL);
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}
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void plat_arm_secure_wdt_stop(void)
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{
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sp805_stop(ARM_SP805_TWDG_BASE);
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}
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void bl1_platform_setup(void)
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{
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arm_bl1_platform_setup();
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/* Initialize System level generic or SP804 timer */
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fvp_timer_init();
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/* On FVP RevC, initialize SMMUv3 */
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if ((arm_config.flags & ARM_CONFIG_FVP_HAS_SMMUV3) != 0U)
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smmuv3_security_init(PLAT_FVP_SMMUV3_BASE);
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}
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__dead2 void bl1_plat_fwu_done(void *client_cookie, void *reserved)
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{
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/* Setup the watchdog to reset the system as soon as possible */
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sp805_refresh(ARM_SP805_TWDG_BASE, 1U);
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while (1)
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wfi();
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}
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